SCOPUS 정보 검색 플랫폼

Journal of the Electrochemical Society

Volumn 158, Issue 10, 2011, Pages

Electronic structure of cerium oxide gate dielectric grown by plasma-enhanced atomic layer deposition

(5) Kim, Woo Hee a,b Maeng, W J c Kim, Min Kyu a Gatineau, Julien d Kim, Hyungjun a

a Yonsei University (South Korea)

b Pohang University of Science and Technology (POSTECH) (South Korea)

c Samsung Advanced Institute of Technology (SAIT) (South Korea)

d AIR LIQUIDE (France)

Author keywords

[No Author keywords available]

Indexed keywords

ANNEALING TEMPERATURES; BAND OFFSETS; BARRIER HEIGHTS; CERIUM OXIDES; CYCLOPENTADIENYLS; DEPOSITION TECHNIQUE; ENERGY BANDGAPS; FILM CHARACTERISTICS; FOWLER-NORDHEIM; INTERFACIAL LAYER; PLASMA-ENHANCED ATOMIC LAYER DEPOSITION; POOLE-FRENKEL; POST DEPOSITION ANNEALING; TRAP ENERGY LEVELS; ULTRAVIOLET PHOTOEMISSION SPECTROSCOPY;

ATOMIC LAYER DEPOSITION; CERIUM; CERIUM COMPOUNDS; CRYSTAL ATOMIC STRUCTURE; DENSITY FUNCTIONAL THEORY; DEPOSITION; DIELECTRIC MATERIALS; ELECTRONIC PROPERTIES; ELECTRONIC STRUCTURE; EMISSION SPECTROSCOPY; GATE DIELECTRICS; GATES (TRANSISTOR); OXYGEN VACANCIES; SPECTROSCOPIC ELLIPSOMETRY;

PLASMA DEPOSITION;

EID: 80052092311 PISSN: 00134651 EISSN: None Source Type: Journal
DOI: 10.1149/1.3625611 Document Type: Article

Times cited : (53)

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