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Volumn , Issue , 2009, Pages 78-87

VMATCH: Using logical variation to counteract physicalvariation in bottom-up, nanoscale systems

Author keywords

[No Author keywords available]

Indexed keywords

BUILDING BLOCKES; FAN-OUT; LOGICAL FUNCTIONS; MANUFACTURING PROCESS; NANO-SCALE SYSTEM; OPERATING RANGES; PATH DELAY; SMALL FEATURES;

EID: 77949419595     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPT.2009.5377684     Document Type: Conference Paper
Times cited : (21)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.