메뉴 건너뛰기




Volumn 22, Issue 4, 2005, Pages 306-315

Seven strategies for tolerating highly defective fabrication

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; ARRAYS; DEFECTS; LOGIC DEVICES; MATHEMATICAL MODELS; NANOSTRUCTURED MATERIALS; NANOTECHNOLOGY; SYNTHESIS (CHEMICAL);

EID: 24344437274     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/MDT.2005.94     Document Type: Article
Times cited : (104)

References (12)
  • 1
    • 0037392525 scopus 로고    scopus 로고
    • "Nanoscale Molecular-Switch Crossbar Circuits"
    • Apr.
    • Y. Chen et al., "Nanoscale Molecular-Switch Crossbar Circuits," Nanotechnology, vol. 14, no. 4, Apr. 2003, pp. 462-468.
    • (2003) Nanotechnology , vol.14 , Issue.4 , pp. 462-468
    • Chen, Y.1
  • 2
    • 0141510585 scopus 로고    scopus 로고
    • "Large-Scale Hierarchical Organization of Nanowire Arrays for Integrated Nanosystems"
    • Sept.
    • D. Whang et al., "Large-Scale Hierarchical Organization of Nanowire Arrays for Integrated Nanosystems," Nanoletters, vol. 3, no. 9, Sept. 2003, pp. 1255-1259.
    • (2003) Nanoletters , vol.3 , Issue.9 , pp. 1255-1259
    • Whang, D.1
  • 3
    • 0035834415 scopus 로고    scopus 로고
    • "Logic Gates and Computation from Assembled Nanowire Building Blocks"
    • 9 Nov.
    • Y. Huang et al., "Logic Gates and Computation from Assembled Nanowire Building Blocks," Science, vol. 294, no. 4545, 9 Nov. 2001, pp. 1313-1317.
    • (2001) Science , vol.294 , Issue.4545 , pp. 1313-1317
    • Huang, Y.1
  • 4
    • 0032510985 scopus 로고    scopus 로고
    • "A Defect-Tolerant Computer Architecture: Opportunities for Nanotechnology"
    • 12 June
    • J.R. Heath et al., "A Defect-Tolerant Computer Architecture: Opportunities for Nanotechnology," Science, vol. 280, no. 5370, 12 June 1998, pp. 1716-1721.
    • (1998) Science , vol.280 , Issue.5370 , pp. 1716-1721
    • Heath, J.R.1
  • 6
  • 7
    • 18744378460 scopus 로고    scopus 로고
    • "Design of Programmable Interconnect for Sublithographic Programmable Logic Arrays"
    • ACM Press
    • A. DeHon, "Design of Programmable Interconnect for Sublithographic Programmable Logic Arrays," Proc. Int'l Symp. Field-Programmable Gate Arrays (FPGA 05), ACM Press, 2005, pp. 127-137.
    • (2005) Proc. Int'l Symp. Field-Programmable Gate Arrays (FPGA 05) , pp. 127-137
    • DeHon, A.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.