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Volumn , Issue , 2006, Pages 131-140

A reconfigurable architecture for hybrid CMOS/nanodevice circuits

Author keywords

Integrated hybrid circuits; Nanoelectronics; Programmable interconnect; Programmable logic

Indexed keywords

AUTOMATION; CMOS INTEGRATED CIRCUITS; FIELD PROGRAMMABLE GATE ARRAYS; INTEGRATED CIRCUIT LAYOUT; NANOTECHNOLOGY; OPTIMIZATION; SEMICONDUCTOR DIODES;

EID: 33745847567     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1117201.1117221     Document Type: Conference Paper
Times cited : (91)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.