메뉴 건너뛰기




Volumn , Issue , 2009, Pages 174-183

PIPP: Promotion/insertion pseudo-partitioning of multi-core shared caches

Author keywords

Cache; Contention; Insertion; Multi core; Promotion; Sharing

Indexed keywords

CACHE MANAGEMENT; CACHE MANAGEMENT POLICIES; CACHE PARTITIONING; MEMORY ACCESS PATTERNS; MULTI CORE; MULTI-CORE PROCESSOR; POOR PERFORMANCE; SHARED CACHE; SINGLE MECHANISMS;

EID: 70450279102     PISSN: 10636897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1555754.1555778     Document Type: Conference Paper
Times cited : (277)

References (41)
  • 2
    • 0036469652 scopus 로고    scopus 로고
    • SimpleScalar: An Infrastructure for Computer System Modeling
    • Feb
    • T. Austin, E. Larson, and D. Ernst. SimpleScalar: An Infrastructure for Computer System Modeling. IEEE Micro Magazine, pages 59-67, Feb. 2002.
    • (2002) IEEE Micro Magazine , pp. 59-67
    • Austin, T.1    Larson, E.2    Ernst, D.3
  • 3
    • 33749079198 scopus 로고    scopus 로고
    • BioPerf: A Benchmark Suite to Evaluate High-Performance Computer Architecture of Bioinformatics Applications
    • Austin, TX, USA, Oct
    • D. A. Bader, Y. Li, T. Li, and V. Sachdeva. BioPerf: A Benchmark Suite to Evaluate High-Performance Computer Architecture of Bioinformatics Applications. In Proc. of the IEEE Int. Symp. on Workload Characterization, pages 163-173, Austin, TX, USA, Oct. 2005.
    • (2005) Proc. of the IEEE Int. Symp. on Workload Characterization , pp. 163-173
    • Bader, D.A.1    Li, Y.2    Li, T.3    Sachdeva, V.4
  • 7
    • 34548023929 scopus 로고    scopus 로고
    • Cooperative Cache Partitioning for Chip Multiprocessors
    • Seattle, WA, June
    • J. Chang and G. Sohi. Cooperative Cache Partitioning for Chip Multiprocessors. In Proc. of the 21st Int. Conference on Supercomputing, pages 242-252, Seattle, WA, June 2007.
    • (2007) Proc. of the 21st Int. Conference on Supercomputing , pp. 242-252
    • Chang, J.1    Sohi, G.2
  • 9
    • 56349130887 scopus 로고    scopus 로고
    • Inside Intel Core Microarchitecture and Smart Memory Access
    • J. Doweck. Inside Intel Core Microarchitecture and Smart Memory Access. White paper, Intel Corporation, 2006. http://download.intel.com/technology/ architecture/sma.pdf.
    • (2006) White paper
    • Doweck, J.1
  • 16
    • 0036290538 scopus 로고    scopus 로고
    • Timekeeping in the Memory System: Predicting and Optimizing Memory Behavior
    • Anchorage, AK, USA, May
    • Z. Hu, M. Martonosi, and S. Kaxiras. Timekeeping in the Memory System: Predicting and Optimizing Memory Behavior. In Proc. of the 29th Int. Symp. on Computer Architecture, pages 209-220, Anchorage, AK, USA, May 2002.
    • (2002) Proc. of the 29th Int. Symp. on Computer Architecture , pp. 209-220
    • Hu, Z.1    Martonosi, M.2    Kaxiras, S.3
  • 17
    • 8344246922 scopus 로고    scopus 로고
    • CQoS: A Framework for Enabling QoS in Shared Caches of CMP Platforms
    • Saint-Malo, France, June
    • R. Iyer. CQoS: A Framework for Enabling QoS in Shared Caches of CMP Platforms. In Proc. of the Int. Conference on Supercomputing, Saint-Malo, France, June 2004.
    • (2004) Proc. of the Int. Conference on Supercomputing
    • Iyer, R.1
  • 19
    • 70450275948 scopus 로고    scopus 로고
    • A. Jaleel, W. Hasenplaugh, M. Qureshi, J. Sebot, S. S. Jr., and J. Emer. Adaptive Insertion Policies for Managing Shared Caches. In Proc. of the 17th Int. Conference on Parallel Architectures and Compilation Techniques, 2007.
    • A. Jaleel, W. Hasenplaugh, M. Qureshi, J. Sebot, S. S. Jr., and J. Emer. Adaptive Insertion Policies for Managing Shared Caches. In Proc. of the 17th Int. Conference on Parallel Architectures and Compilation Techniques, 2007.
  • 20
    • 0034856732 scopus 로고    scopus 로고
    • Cache Decay: Exploiting Generational Behavior to Reduce Cache Leakage Power
    • Göteborg, Sweden, June
    • S. Kaxiras, Z. Hu, and M. Martonosi. Cache Decay: Exploiting Generational Behavior to Reduce Cache Leakage Power. In Proc. of the 28th Int. Symp. on Computer Architecture, pages 240-251, Göteborg, Sweden, June 2001.
    • (2001) Proc. of the 28th Int. Symp. on Computer Architecture , pp. 240-251
    • Kaxiras, S.1    Hu, Z.2    Martonosi, M.3
  • 22
    • 41149104074 scopus 로고    scopus 로고
    • Counter-Based Cache Replacement and Bypassing Algorithms
    • Apr
    • M. Kharbutli and Y. Solihin. Counter-Based Cache Replacement and Bypassing Algorithms. Trans. on Computers, 57(4):433-447, Apr. 2008.
    • (2008) Trans. on Computers , vol.57 , Issue.4 , pp. 433-447
    • Kharbutli, M.1    Solihin, Y.2
  • 24
    • 70649086935 scopus 로고    scopus 로고
    • Fair Caching in a Chip Multi-Processor Architecture
    • Yorktown Heights, NY, USA, Oct
    • S. Kim, D. Chandra, and Y. Solihin. Fair Caching in a Chip Multi-Processor Architecture. In Proc. of the IBM P=AĈ2 Conference, Yorktown Heights, NY, USA, Oct. 2004.
    • (2004) Proc. of the IBM P=AĈ2 Conference
    • Kim, S.1    Chandra, D.2    Solihin, Y.3
  • 26
  • 27
    • 0031339427 scopus 로고    scopus 로고
    • MediaBench: A Tool for Evaluating and Synthesizing Multimedia and Communication Systems
    • Research Triangle Park, NC, USA, Dec
    • C. Lee, M. Potkonjak, and W. H. Mangione-Smith. MediaBench: A Tool for Evaluating and Synthesizing Multimedia and Communication Systems. In Proc. of the 30th Int. Symp. on Microarchitecture, pages 330-335, Research Triangle Park, NC, USA, Dec. 1997.
    • (1997) Proc. of the 30th Int. Symp. on Microarchitecture , pp. 330-335
    • Lee, C.1    Potkonjak, M.2    Mangione-Smith, W.H.3
  • 28
  • 29
    • 66749155879 scopus 로고    scopus 로고
    • Cache Bursts: A New Approach for Eliminating Dead Blocks and Increasing Cache Efficiency
    • Lake Como, Italy, Nov
    • H. Liu, M. Ferdman, J. Huh, and D. Burger. Cache Bursts: A New Approach for Eliminating Dead Blocks and Increasing Cache Efficiency. In Proc. of the 41st Int. Symp. on Microarchitecture, pages 222-233, Lake Como, Italy, Nov. 2008.
    • (2008) Proc. of the 41st Int. Symp. on Microarchitecture , pp. 222-233
    • Liu, H.1    Ferdman, M.2    Huh, J.3    Burger, D.4
  • 35
    • 35348920021 scopus 로고    scopus 로고
    • M. K. Qureshi, A. Jaleel, Y. N. Patt, S. C. S. Jr., and J. Emer. Adaptive Insertion Policies for High-Performance Caching. In Proc. of the 34th Int. Symp. on Computer Architecture, pages 381-391, San Diego, CA, USA, June 2007.
    • M. K. Qureshi, A. Jaleel, Y. N. Patt, S. C. S. Jr., and J. Emer. Adaptive Insertion Policies for High-Performance Caching. In Proc. of the 34th Int. Symp. on Computer Architecture, pages 381-391, San Diego, CA, USA, June 2007.
  • 36
    • 34548042910 scopus 로고    scopus 로고
    • Utility-Based Cache Partitioning: A Low-Overhead, High-Performance, Runtime Mechanism to Partition Shared Caches
    • Orlando, FL, Dec
    • M. K. Qureshi and Y. N. Patt. Utility-Based Cache Partitioning: A Low-Overhead, High-Performance, Runtime Mechanism to Partition Shared Caches. In Proc. of the 39th Int. Symp. on Microarchitecture, pages 423-432, Orlando, FL, Dec. 2006.
    • (2006) Proc. of the 39th Int. Symp. on Microarchitecture , pp. 423-432
    • Qureshi, M.K.1    Patt, Y.N.2
  • 39
    • 0026925878 scopus 로고
    • Optimal Paritioning of Cache Memory
    • Sep
    • H. S. Stone, J. Tuerk, and J. L. Wolf. Optimal Paritioning of Cache Memory. Trans. on Computers, 41(9):1054-1068, Sep. 1992.
    • (1992) Trans. on Computers , vol.41 , Issue.9 , pp. 1054-1068
    • Stone, H.S.1    Tuerk, J.2    Wolf, J.L.3
  • 40
    • 1642371317 scopus 로고    scopus 로고
    • Dynamic Partitioning of Shared Cache Memory
    • G. E. Suh, L. Rudolph, and S. Devadas. Dynamic Partitioning of Shared Cache Memory. Jour. of Supercomputing, 28(1):7-26, 2004.
    • (2004) Jour. of Supercomputing , vol.28 , Issue.1 , pp. 7-26
    • Suh, G.E.1    Rudolph, L.2    Devadas, S.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.