Design of gate stacks for improved program/erase speed, retention and process margin aiming next generation metal nanocrystal memories

Semiconductor Science and Technology

Volumn 24, Issue 11, 2009, Pages

  Jang, Jaeman ^a   Choi, Changmin ^a   Lee, Jang Sik ^a   Min, Kyeong Sik ^a   Lee, Jaegab ^a   Kim, Dong Myong ^a   Kim, Dae Hwan ^a  

^a Kookmin University   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

BAND GAP ENGINEERING; BAND GAPS; COMPARATIVE ANALYSIS; DEGREE OF FREEDOM; GATE STACKS; GATE STRUCTURE; HIGH-K DIELECTRIC; METAL NANOCRYSTAL MEMORY; METAL NANOCRYSTALS; PROCESS MARGINS; PROGRAM/ERASE; STORAGE DEVICES; TECHNOLOGY COMPUTER AIDED DESIGN;

COBALT; COMPUTER AIDED ANALYSIS; COMPUTER AIDED DESIGN; COMPUTER SIMULATION; ENERGY GAP; HAFNIUM COMPOUNDS; LOGIC GATES; NANOCRYSTALS; SEMICONDUCTOR STORAGE;

SPEED;

EID: 70450003299     PISSN: 02681242     EISSN: 13616641     Source Type: Journal    
DOI: 10.1088/0268-1242/24/11/115009     Document Type: Article

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