Large-scale SRAM variability characterization in 45 nm CMOS

IEEE Journal of Solid-State Circuits

Volumn 44, Issue 11, 2009, Pages 3174-3192

  Guo, Zheng ^a   Carlson, Andrew ^b   Pang, Liang Teck ^c   Duong, Kenneth T ^d   Liu, Tsu Jae King ^a   Nikolić, Borivoje ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b ADVANCED MICRO DEVICES   (United States)

^c IBM T J WATSON RESEARCH CENTER   (United States)

^d SUN MICROSYSTEMS   (United States)

Author keywords

CMOS; Measurement; Noise margins; SRAM; Variability

Indexed keywords

BIT LINES; CMOS; CMOS PROCESSS; MEASUREMENT DATA; NOISE MARGINS; PROCESS VARIABILITY; READ STABILITY; SCALE CHARACTERIZATION; SRAM; SRAM STABILITY; TEST CHIPS; TEST STRUCTURE; VARIABILITY;

METRIC SYSTEM;

STATIC RANDOM ACCESS STORAGE;

EID: 70449567253     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2009.2032698     Document Type: Article

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