A low cost drive current enhancement technique using shallow trench isolation induced stress for 45-nm node

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2006, Pages 82-83

  Le Cam, C ^a   Guyader, F ^b   De Buttet, C ^c   Guyader, P ^b   Ribes, G ^b   Sardo, M ^b   Vanbergue, S ^a   Boeuf F ^b   Arnaud, F ^b   Josse, E ^b   Haond, M ^b  

^a NXP SEMICONDUCTORS   (Netherlands)

^b STMICROELECTRONICS   (France)

^c FREESCALE SEMICONDUCTOR INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHEMICAL VAPOR DEPOSITION; ELECTRIC CURRENTS; NANOTECHNOLOGY; OXIDES; PLASMA DENSITY; VLSI CIRCUITS;

CHANNEL ORIENTATIONS; DRIVE CURRENT ENHANCEMENT; HIGH DENSITY PLASMA (HDP) PROCESS; MOBILITY ENHANCEMENT;

MOS DEVICES;

EID: 41149131821     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

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6. R.Arghavani et al., IEEE Trans.Elec.Dev.,pp1740-1743,October 2004
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8. C.Gallon et al.,IEEE Trans.Elec.Dev.,pp.l254-1261,August 2004