Compensation of systematic variations through optimal biasing of SRAM wordlines

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 2008, Pages 411-414

  Carlson, Andrew ^a   Guo, Zheng ^a   Pang, Liang Teck ^a   Liu, Tsu Jae King ^a   Nikolić, Borivoje ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CELL STABILITIES; LOW POWERS; OPTIMAL BIASING; OPTIMAL VALUES; PROCESS VARIABILITIES; SENSOR CIRCUITS; SYSTEMATIC VARIATIONS; TEMPERATURE VARIATIONS; TEST CHIPS; TRACK CHANGES; WORD LINES; WRITE MARGINS;

DYNAMIC RANDOM ACCESS STORAGE; NETWORKS (CIRCUITS); SENSORS; STATIC RANDOM ACCESS STORAGE;

INTEGRATED CIRCUITS;

EID: 57849164125     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CICC.2008.4672107     Document Type: Conference Paper

References (7)

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4. C. Wann et al., "SRAM cell design for stability methodology," IEEE VLSI-TSA, 2005, pp. 21-22.
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7. A. Carlson, "Mechanism of increase in SRAM Vmin due to negative bias temperature instability," IEEE TDMR, 2007, pp. 479-487.