A unified model for permanent and recoverable NBTI based on hole trapping and structure relaxation

IEEE International Reliability Physics Symposium Proceedings

Volumn , Issue , 2009, Pages 26-32

  Ielmini, Daniele ^a   Manigrasso, Mariaflavia ^a   Gattel, Francesco ^b   Valentini, Grazia ^b  

^a POLITECNICO DI MILANO   (Italy)

^b Numonyx   (Italy)

Author keywords

Charge trapping; CMOS reliability; Gate dielectric reliability; Negative bias temperature instability; Reliability estimation; Reliability modeling

Indexed keywords

CMOS RELIABILITY; GATE DIELECTRIC RELIABILITY; NEGATIVE BIAS-TEMPERATURE INSTABILITY; RELIABILITY ESTIMATION; RELIABILITY MODELING;

ACTIVATION ENERGY; CHARGE TRAPPING; DEGRADATION; DRAIN CURRENT; GATE DIELECTRICS; GATES (TRANSISTOR); NEGATIVE TEMPERATURE COEFFICIENT; SIMULATORS; THERMODYNAMIC STABILITY;

RELIABILITY;

EID: 69549124588     PISSN: 15417026     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IRPS.2009.5173220     Document Type: Conference Paper

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