A study of hot-hole injection during programming drain disturb in flash memories

IEEE Transactions on Electron Devices

Volumn 53, Issue 4, 2006, Pages 668-676

  Ielmini, Daniele ^a,b   Ghetti, Andrea ^c   Spinelli, Alessandro S ^a,b   Visconti, Angelo ^c  

^a POLITECNICO DI MILANO   (Italy)

^b Italian University Nano Electronics Team IUNET   (Italy)

^c STMICROELECTRONICS   (Italy)

Author keywords

Flash memories; Hot carriers; Monte Carlo (MC) modeling; Reliability modeling

Indexed keywords

ELECTRON TUNNELING; HOT CARRIERS; IMPACT IONIZATION; MATHEMATICAL MODELS; MONTE CARLO METHODS;

CARRIER-SEPARATION MEASUREMENTS; FLOATING-GATE; HOT-HOLE INJECTION; SECONDARY ELECTRON GENERATION;

FLASH MEMORY;

EID: 33645742493     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2006.870280     Document Type: Article

References (34)

1. D. Ielmini, A. S. Spinelli, A. L. Lacaita, L. Confalonieri, and A. Visconti, "New technique for fast characterization of SILC distribution in Flash arrays," in Proc. Int. Reliability Physics Symp. (IRPS), Orlando, FL, 2001, pp. 73-80.
2. D. Ielmini, A. S. Spinelli, A. L. Lacaita, and A. Modelli, "Equivalent cell approach for extraction of the SILC distribution in Flash EEPROM cells," IEEE Electron Device Lett., vol. 23, no. 1, pp. 40-42, Jan. 2002.
3. A. Modelli, "Reliability of thin dielectric for non-volatile applications," Microelectron. Eng., vol. 48, no. 1, pp. 403-410, Sep. 1999.
4. R. Bez, E. Camerlenghi, A. Modelli, and A. Visconti, "Introduction to Flash memory," Proc. IEEE, vol. 91, no. 4, pp. 489-502, Apr. 2003.
5. D. Ielmini, A. S. Spinelli, A. L. Lacaita, and A. Visconti, "Statistical profiling of SILC spot in Flash memories," IEEE Trans. Electron Devices, vol. 49, no. 10, pp. 1723-1728, Oct. 2002.
6. G. Verma and N. Mielke, "Reliability performance of ETOX-based Flash memories," in Proc. Int. Reliability Physics Symp. (IRPS), Monterey, CA, 1988, pp. 158-166.
7. A. Chimenton, A. S. Spinelli, D. Ielmini, A. L. Lacaita, A. Visconti, and P. Olivo, "Drain-accelerated degradation of tunnel oxides in Flash memories," in IEDM Tech. Dig., San Francisco, CA, 2002, pp. 167-170.
8. D. Ielmini, A. Ghetti, S. Beltrami, A. S. Spinelli, A. L. Lacaita, and A. Visconti, "Experimental and Monte Carlo analysis of drain-avalanche hot-hole injection for reliability optimization in Flash memories," in IEDM Tech. Dig., Washington, DC, 2003, pp. 157-160.
9. A. Roy, R. Kazerounian, A. Kablanian, and B. Eitan, "Substrate injection induced program disturb - A new reliability consideration for Flash-EPROM arrays," in Proc. Int. Reliability Physics Symp. (IRPS), San Diego, CA, 1992, pp. 68-75.
10. S. Yamada, T. Yamane, K. Amemiya, and K. Naruke, "A self-convergence erase for NOR Flash EEPROM using avalanche hot carrier injection," IEEE Trans. Electron Devices, vol. 43, no. 11, pp. 1937-1941, Nov. 1996.
11. K. Yoshikawa, S. Mori, E. Sakagami, Y. Ohshima, Y. Kaneko, and N. Arai, "Lucky-hole injection induced by band-to-band tunneling leakage in stacked gate transistors," in IEDM Tech. Dig., San Francisco, CA, 1990, pp. 577-580.
12. R. Rakkhit, S. Haddad, C. Chang, and J. Yue, "Drain-avalanche induced hole injection and generation of interface traps in thin oxide MOS devices," in Proc. Int. Reliability Physics Symp. (IRPS), New Orleans, LA, 1990, pp. 150-153.
13. C. Chang, S. Haddad, B. Swaminathan, and J. Lien, "Drain-avalanche and hole-trapping induced gate leakage in thin-oxide MOS devices," IEEE Electron Device Lett., vol. 9, no. 11, pp. 588-590, Nov. 1988.
14. S. Haddad, C. Chang, B. Swaminathan, and J. Lien, "Degradations due to hole trapping in Flash memory cells," IEEE Electron Device Lett., vol. 10, no. 3, pp. 117-119, Mar. 1989.
15. J. Chen, J. Hsu, S. Luan, D. Liu, S. Haddad, C. Chang, S. Longcor, and J. Lien, "Short channel enhanced degradation during discharge of Flash EEPROM memory cell," in IEDM Tech. Dig., Washington, DC, 1995, pp. 331-334.
16. Y.-L. Chu and C.-Y. Wu, "A new observation of band-to-band tunneling induced hot-carrier stress using charge-pumping technique," IEEE Electron Device Lett., vol. 21, no. 3, pp. 123-125, Mar. 2000.
17. K. Kobayashi, A. Teramoto, M. Hirayama, and Y. Fujita, "Model for the substrate hole current based on thermionic hole emission from the anode during Fowler-Nordheim electron tunneling in n-channel metal-oxide-semiconductor field-effect transistor," J. Appl. Phys., vol. 77, no. 7, pp. 3277-3282, Apr. 1995.
18. N. Matsukawa, S. Yamada, K. Amemiya, and H. Hazama, "A hot hole-induced low-level leakage current in thin silicon dioxide films," IEEE Trans. Electron Devices, vol. 43, no. 11, pp. 1924-1929, Nov. 1996.
19. 2 films," in Proc. Int. Reliability Physics Symp. (IRPS), Dallas, TX, 1996, pp. 113-116.
20. T. Wang, N.-K. Zous, J.-L. Lai, and C. Huang, "Hot hole stress induced leakage current (SILC) transient in tunnel oxide," IEEE Electron Device Lett., vol. 19, no. 11, pp. 411-413, Nov. 1998.
21. E. Wu, E. Nowak, and W. Lai, "Off-state mode TDDB reliability for ultra-thin gate oxides: New methodology and the impact of oxide thickness scaling," in Proc. Int. Reliability Physics Symp. (IRPS), Phoenix, AZ, 2004, pp. 84-94.
22. J. D. Bude, M. Mastrapasqua, M. R. Pinto, R. W. Gregor, P. J. Kelley, R. A. Kohler, C. W. Leung, Y. Ma, R. J. McPartland, P. K. Roy, and R. Singh, "Secondary electron Flash - A high performance, low power Flash technology for 0.35 μm and below," in IEDM Tech. Dig., Washington, DC, 1997, pp. 279-282.
23. J. Chen, T. Y. Chan, I. C. Chen, P. K. Ko, and C. Hu, "Subbreakdown drain leakage current in MOSFETs," IEEE Electron Device Lett., vol. EDL-8, no. 11, pp. 515-517, Nov. 1987.
24. C. Chang, C. Hu, and R. W. Brodersen, "Quantum yield of electron impact ionization in silicon," J. Appl. Phys., vol. 57, no. 2, pp. 302-309, Jan. 1985.
25. D. Ielmini, A. S. Spinelli, A. L. Lacaita, D. J. Di Maria, and G. Ghidini, "A detailed investigation of the quantum yield experiment," IEEE Trans. Electron Devices, vol. 48, no. 8, pp. 1696-1702, Aug. 2001.
26. A. Ghetti, "Calibration of hole scattering rates in silicon with a large set of experimental data including high voltage quantum yield, drain disturb and substrate hole injection," in Proc. Simulation Semiconductor Processes and Devices (SISPAD) Conf., Boston, MA, 2003, pp. 71-74.
27. D. Esseni, L. Selmi, A. Ghetti, and E. Sangiorgi, "The injection efficiency of CHISEL gate currents in short MOS devices: Physical mechanisms, device implications and sensitivity to technological parameters," IEEE Trans. Electron Devices, vol. 47, no. 11, pp. 2194-2200, Nov. 2000.
28. T. Kunikiyo, M. Takenaka, M. Morifuji, K. Taniguchi, and C. Hamaguchi, "A model of impact ionization due to the primary hole in silicon for full band Monte Carlo simulation," J. Appl. Phys., vol. 79, no. 10, pp. 7718-7725, May 1996.
29. A. Ghetti, M. Alam, J. Bude, D. Monroe, E. Sangiorgi, and H. Vaidya, "Stress induced leakage current analysis via quantum yield experiments," IEEE Trans. Electron Devices, vol. 47, no. 7, pp. 1341-1348, Jul. 2000.
30. A. Ghetti, "MOSFET hot-carrier induced gate current simulation by self-consistent silicon/oxide Monte Carlo device simulation," in Proc. Simulation Semiconductor Processes and Devices (SISPAD) Conf., Kobe, Japan, 2002, pp. 231-234.
31. N. Sano, M. V. Fischetti, and S. E. Laux, "Hole-initiated impact ionization and split-off band in Ge, Si, GaAs, and InGaAs," in IEDM Tech. Dig., San Francisco, CA, 1998, pp. 198-201.
32. Y. Kamakura, I. Kawashima, K. Deguchi, and K. Taniguchi, "Monte Carlo simulation of quantum yields exceeding unity as a probe of high-energy hole scattering rates in Si," in IEDM Tech. Dig., Washington, DC, 1999, pp. 727-730.
33. K. Hasnat, C.-F. Yeap, S. Yallepalli, W.-K. Shih, S. A. Hareland, V. M. Agostinelli, A. F. Tasch, and C. M. Maziar, "A pseudo-lucky electron model for simulation of electron gate current in submicron NMOSFET's," IEEE Trans. Electron Devices, vol. 43, no. 8, pp. 1264-1273, Aug. 1996.
34. P. Palestri, L. Selmi, G. A. M. Hurkx, J. W. Slotboom, and E. Sangiorgi, "Energy dependent electron and hole impact ionization in Si bipolar transistors," in IEDM Tech. Dig., San Francisco, CA, 1998, pp. 885-888.