The road to 3D EDA tool readiness

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn , Issue , 2009, Pages 429-436

  Chiang, Charles ^a   Sinha, Subarna ^a  

^a SYNOPSYS INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

3-D ICS; 3-D INTEGRATIONS; 3D IC DESIGNS; DESIGN CAPACITIES; DESIGN CHALLENGES; EDA TOOLS; MOORE'S LAWS; PREFERRED FEATURES; SYSTEM COMPONENTS; THROUGH-SILICON VIAS; VERTICAL DIMENSIONS;

DIES; DIGITAL INTEGRATED CIRCUITS; INTERCONNECTION NETWORKS;

COMPUTER AIDED DESIGN;

EID: 64549084500     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASPDAC.2009.4796519     Document Type: Conference Paper

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