Thermal-aware 3D IC placement via transformation

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn , Issue , 2007, Pages 780-785

  Cong, Jason ^a   Luo, Guojie ^a   Wei, Jie ^a   Zhang, Yan ^a  

^a University of California   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

(100) SILICON; CELL PLACEMENT; CIRCUIT PERFORMANCES; DESIGN AUTOMATION CONFERENCE (DAC); DEVICE LAYERS; GRAPH-BASED; HALF-PERIMETER WIRELENGTH (HPWL); HETEROGENEOUS (HYBRID) SYSTEMS; IC TECHNOLOGIES; ION CHROMATOGRAPHY (IC) TECHNOLOGY; LAYER ASSIGNMENT; LOWER-POWER CONSUMPTION; MANUFACTURING ABILITY; ON CHIP TEMPERATURE; SOUTH PACIFIC; TRANSFORMATION TECHNIQUES; WINDOW-BASED; WIRE LENGTHS;

APPLICATION SPECIFIC INTEGRATED CIRCUITS; ATMOSPHERIC TEMPERATURE; ATMOSPHERICS; COMPUTER AIDED DESIGN; DIGITAL INTEGRATED CIRCUITS; GRAPH THEORY; INDUSTRIAL ENGINEERING; INTEGRATED CIRCUITS; MECHANIZATION; MICROPROCESSOR CHIPS; SPACE TIME ADAPTIVE PROCESSING; WINDOWS;

MATHEMATICAL TRANSFORMATIONS;

EID: 46649110782     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASPDAC.2007.358084     Document Type: Conference Paper

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