ILLIADS-T: An electrothermal timing simulator for temperature-sensitive reliability diagnosis of CMOS VLSI chips

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 17, Issue 8, 1998, Pages 668-681

  Cheng, Yi Kan ^a   Raha, Prasun ^a,b   Teng, Chin Chi ^a   Rosenbaum, Elyse ^a   Kang, Sung Mo ^a  

^a University of Illinois at Urbana Champaign   (United States)

^b UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

Author keywords

Cmos integrated circuits; Electrothermal effects; Integrated circuit reliability; Temperature; Timing

Indexed keywords

CMOS INTEGRATED CIRCUITS; MICROPROCESSOR CHIPS; RELIABILITY; THERMAL EFFECTS; TIMING CIRCUITS; VLSI CIRCUITS;

ELECTROTHERMAL TIMING SIMULATORS;

INTEGRATED CIRCUIT LAYOUT;

EID: 0032139246     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.712099     Document Type: Article

References (22)

1. K. Fukahori and P. R. Gray, "Computer simulation of integrated circuits in the presence of electrothermal interaction," IEEE J. Solid-State Circuits, pp. 834-846, Dec. 1976.
2. S. S. Lee and D. J. Allstot, "Electrothermal simulation of integrate circuits," IEEE J. Solid-State Circuits, pp. 1283-1293, Dec. 1993.
3. C. H. Diaz, S. M. Kang, and C. Duvvury, "Circuit-level electrotherma simulation of electrical overstress failures in advanced MOS I/O protection devices," IEEE Trans. Computer-Aided Design, pp. 482-4193, Apr 1994.
4. Y. H. Shih, Y. Leblebici, and S. M. Kang, "ILLIADS: A fast timing an reliability simulator for digital MOS circuits," IEEE Trans. Computer Aided Design, pp. 1387-1402, Sept. 1993.
5. Y. K. Cheng, "Electrothermal analysis of packaged high-performanc microprocessor," Intel Corp. Tech. Rep., Aug. 1996.
6. A. Dharchoudhury, S. M. Kang, K. H. Kim, and S. H. Lee, "Fast an accurate timing simulation with regionwise quadratic models of MO I-V characteristics," in Proc. ACM/IEEE Int. Conf. Computer-Aide Design, Nov. 1994, pp. 208-211.
7. R. Darveaux, I. Turlik, L. T. Hwang, and A. Reisman, "Thermal stres analysis of a multichip package design," IEEE Trans. Comp., Hybrids Manufact. Technol, pp. 663-672, Dec. 1989.
8. C. P. Wang and B. J. Sheu, "Temperature dependence modeling fo MOS VLSI circuit simulation," IEEE Trans. Computer-Aided Design pp. 1065-1073, Oct. 1989.
9. A. Gupta, "ACE: A circuit extractor," in Proc. ACM/IEEE Desig Automation Conf., 1983, pp. 721-725.
10. A. M. Hill, "Switching density analysis for power and reliability in VLS circuits, Ph.D. dissertation, Univ. Illinois, Urbana-Champaign, 1996.
11. M. S. Lin, "A better understanding of the channel mobility of S MOSFET's based on the physics of quantized subbands," IEEE Trans Electron Devices, pp. 2406-2411, 1988.
12. M. S. Liang, J. Y. Choi, P. K. Ko, and C. Hu, "Inversion-laye capacitance and mobility of very thin gate-oxide MOSFET's," IEE Trans. Electron Devices, pp. 409-412, 1986.
13. K. Hess, Advanced Theory of Semiconductor Devices. Englewoo Cliffs, NJ: Prentice-Hall, 1988.
14. 2 interface," Surface Sci., vol. 32, pp. 561-575, 1972.
15. H. Ezawa, S. Kawaji, and K. Nakamura, "Surfons and the electro mobility in silicon inversion layers," Jpn. J. Appl. Phys., vol. 13, pp 126-155, 1974.
16. A. Hartstein, T. H. Ning, and A. B. Fowler, "Electron scattering i silicon inversion layers by oxide and surface roughness," Surface Sci. vol. 58, pp. 181-190, 1976.
17. D. W. Marquardt, "An algorithm for least-squares estimation of nonlinear parameters," J. Soc. Ind. Appl. Math., vol. 11, pp. 431-4141 1963.
18. M. N. Ozisik, Boundary Value Problems of Heat Conduction. Oxford Oxford Univ. Press, 1968.
19. J. F. Thompson, Z. Warsi, and C. W. Mastin, Numerical Grid Generation. Amsterdam, The Netherlands: North-Holland, 1985.
20. J. Kim, S. M. Kang, and S. Sapatnekar, "High performance CMO macromodule layout synthesis," in Proc. Int. Symp. Circuits Syst., Ma 1994, pp. 179-182.
21. Y. C. Lee, H. T. Ghaffari, and J. M. Segelken, "Internal therma resistance of a multi-chip packaging design for VLSI based systems, IEEE Trans. Comp., Hybrids, Manufact. Technol., pp. 163-169, Jun 1989.
22. C. C. Teng, Y. K. Cheng, E. Rosenbaum, and S. M. Kang, "ITEM: A ne electromigration (EM) reliability diagnosis tool using electrotherma timing simulation," in Int. Rel. Phys. Symp. Proc., Apr. 1996, pp 172-179.