A 2.2 mW 1.75 GS/s 5 Bit folding flash aDC in 90 nm diigital CMOS

IEEE Journal of Solid-State Circuits

Volumn 44, Issue 3, 2009, Pages 874-882

  Verbruggen, Bob ^a,b   Craninckx, Jan ^a   Kuijk, Maarten ^b   Wambacq, Piet ^a,b   Van Der Plas, Geert ^a  

^a IMEC   (Belgium)

^b VRIJE UNIVERSITEIT BRUSSEL   (Belgium)

Author keywords

Analog digital conversion; Calibration; CMOS analog integrated circuits.; Comparators

Indexed keywords

ANALOG CIRCUITS; CALIBRATION; COMPARATORS (OPTICAL); DIGITAL INTEGRATED CIRCUITS; ELECTRIC CONVERTERS; ELECTRIC POWER UTILIZATION; INTEGRATED CIRCUITS; LINEAR INTEGRATED CIRCUITS;

ANALOG-DIGITAL CONVERSION; CMOS ANALOG INTEGRATED CIRCUITS.; COMPARATORS; DIGITAL CMOS; FLASH-ADC; FOLDING TECHNIQUES; LOW FREQUENCIES; NYQUIST FREQUENCIES; POWER CONSUMPTION;

CMOS INTEGRATED CIRCUITS;

EID: 61449251800     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2009.2012449     Document Type: Article

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