메뉴 건너뛰기




Volumn 37, Issue 12, 2002, Pages 1599-1609

A 6-b 1.6-Gsample/s flash ADC in 0.18-μm CMOS using averaging termination

Author keywords

Analog to digital conversion; Averaging termination; CMOS analog integrated circuits; Distributed amplifiers; Flash converter; Gray codes; Offset averaging; Resistor averaging network; Sample and hold circuits; Spatial filters

Indexed keywords

AMPLIFIERS (ELECTRONIC); DIGITAL SIGNAL PROCESSING; ELECTRIC DISTORTION; ELECTRIC FILTERS; RESISTORS;

EID: 0036917305     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2002.804334     Document Type: Conference Paper
Times cited : (156)

References (19)
  • 2
    • 0033364066 scopus 로고    scopus 로고
    • A 500-MSample/s, 6-bit nyquist-rate ADC for disk-drive read-channel applications
    • July
    • I. Mehr and D. Dalton, "A 500-MSample/s, 6-bit nyquist-rate ADC for disk-drive read-channel applications," IEEE J. Solid-State Circuits, vol. 34, pp. 912-920, July 1999.
    • (1999) IEEE J. Solid-State Circuits , vol.34 , pp. 912-920
    • Mehr, I.1    Dalton, D.2
  • 4
    • 0035696160 scopus 로고    scopus 로고
    • A 6-b 1.3-Gsample/s A/D converter in 0.35μm CMOS
    • Dec.
    • M. Choi and A.A. Abidi, "A 6-b 1.3-Gsample/s A/D converter in 0.35μm CMOS," IEEE J. Solid-State Circuits, vol. 36, pp. 1847-1858, Dec. 2001.
    • (2001) IEEE J. Solid-State Circuits , vol.36 , pp. 1847-1858
    • Choi, M.1    Abidi, A.A.2
  • 8
    • 0003135251 scopus 로고
    • A technique for reducing differential non-linearity errors in flash A/D converters
    • K. Kattmann and J. Barrow, "A technique for reducing differential non-linearity errors in flash A/D converters," in Proc. IEEE Int. Solid-State Circuits Conf. 1991, pp. 170-171.
    • (1991) Proc. IEEE Int. Solid-State Circuits Conf. , pp. 170-171
    • Kattmann, K.1    Barrow, J.2
  • 16
    • 0030213799 scopus 로고    scopus 로고
    • Power-efficient metastability error reduction in CMOS flash A/D converters
    • Aug.
    • C.L. Portmann and T.H.Y. Meng, "Power-efficient metastability error reduction in CMOS flash A/D converters," IEEE J. Solid-State Circuits, no. 8, Aug. 1996.
    • (1996) IEEE J. Solid-State Circuits , vol.8
    • Portmann, C.L.1    Meng, T.H.Y.2
  • 18
    • 0032316106 scopus 로고    scopus 로고
    • A CMOS 6-b, 400-MSample/s ADC with error correction
    • Dec.
    • S. Tsukamoto, W.G. Schofield, and T. Endo, "A CMOS 6-b, 400-MSample/s ADC with error correction," IEEE J. Solid-State Circuits, vol. 33, pp. 1939-1947, Dec. 1998.
    • (1998) IEEE J. Solid-State Circuits , vol.33 , pp. 1939-1947
    • Tsukamoto, S.1    Schofield, W.G.2    Endo, T.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.