Low power 6-bit flash ADC with reference voltage and common-mode calibration

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2008, Pages 12-13

  Chen, Chun Ying ^a   Le, Michael ^a   Kwang, Young Kim ^a  

^a BROADCOM CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CALIBRATION; MULTICARRIER MODULATION;

COMMON MODES; FLASH-ADC; LOW POWERS; POWER DISSIPATIONS; REFERENCE VOLTAGES;

VLSI CIRCUITS;

EID: 51949115762     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIC.2008.4585932     Document Type: Conference Paper

References (3)

1. Koen Uyttenhove, Michiel S. J. Steyaert; "A 1.8-V 6-bit 1.3-GHz flash ADC in 0.25-μm CMOS", IEEE Journal of Solid-State Circuits, vol. 38, pp. 1115-1122, July 2003.
2. Pedro M. Figueiredo, et. al., "A 90nm CMOS 1.2V 6b 1GS/s Two-Step Subranging ADC", ISSCC 2006, session 31.2, February 2006.
3. Dieter Draxelmayr, "A 6b 600MHz 10mW ADC Array in Digital 90nm CMOS", ISSCC 2004, session 14.7, February 2004.