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Volumn 52, Issue 9, 2005, Pages 1732-1740

A background comparator calibration technique for flash analog-to-digital converters

Author keywords

Comparator; Flash analog to digital converter (ADC); Offset calibration

Indexed keywords

CALIBRATION; CHOPPERS (CIRCUITS); COMPARATOR CIRCUITS; DIGITAL CIRCUITS; ELECTRIC POTENTIAL; PROBABILITY DENSITY FUNCTION; PROBABILITY DISTRIBUTIONS;

EID: 27144497367     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2005.852198     Document Type: Article
Times cited : (44)

References (14)
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    • Dec
    • B. P. Brandt and J. Lutsky, "A 75-mW, 10-b, 20-MSPS CMOS subranging ADC with 9.5 effective bits at Nyquist," IEEE J. Solid-State Circuits, vol. 34, no. 12, pp. 1788-1795, Dec. 1999.
    • (1999) IEEE J. Solid-State Circuits , vol.34 , Issue.12 , pp. 1788-1795
    • Brandt, B.P.1    Lutsky, J.2
  • 6
    • 4344690108 scopus 로고    scopus 로고
    • "Offset calibrating comparator array for 1.2-V, 6-bit, 4-Gsample/s flash ADCs using 0.13-pro CMOS technology"
    • Sep
    • H. Okada, Y. Hashimoto, K. Sakata, T. Tsukada, and K. Ishibashi, "Offset calibrating comparator array for 1.2-V, 6-bit, 4-Gsample/s flash ADCs using 0.13-pro CMOS technology," in Proc, ESSCIRC'03, Sep. 2003, pp. 711-714.
    • (2003) Proc, ESSCIRC'03 , pp. 711-714
    • Okada, H.1    Hashimoto, Y.2    Sakata, K.3    Tsukada, T.4    Ishibashi, K.5
  • 7
    • 0002738481 scopus 로고    scopus 로고
    • "A CMOS 6b 500 MSample/s ADC for hard disk drive read channel"
    • Feb
    • Y. Tamba and K. Yamakido, "A CMOS 6b 500 MSample/s ADC for hard disk drive read channel," in Proc. IEEE Int. Soli-State Circuits Conf., Feb. 1999, pp. 324-325.
    • (1999) Proc. IEEE Int. Soli-State Circuits Conf. , pp. 324-325
    • Tamba, Y.1    Yamakido, K.2
  • 9
    • 0034482479 scopus 로고    scopus 로고
    • "A 13-b 40-Msample/s CMOS pipelined folding ADC with background offset trimming"
    • Dec
    • M.-J. Choe, B.-S. Song, and K. Bacrania, "A 13-b 40-Msample/s CMOS pipelined folding ADC with background offset trimming," IEEE J. Solid-State Circuits, vol. 35, no. 12, pp. 1781-1789, Dec. 2000.
    • (2000) IEEE J. Solid-State Circuits , vol.35 , Issue.12 , pp. 1781-1789
    • Choe, M.-J.1    Song, B.-S.2    Bacrania, K.3
  • 11
    • 0036912842 scopus 로고    scopus 로고
    • "A 10-b 120-Msample/s time-interleaved analog-to-digital converter with digital background calibration"
    • Dec
    • S.M. Jamal, D. Fu, N. C.-J. Chang, P. J. Hurst, and S. H. Lewis, "A 10-b 120-Msample/s time-interleaved analog-to-digital converter with digital background calibration," IEEE J. Solid-State Circuits, vol. 37, no. 12, pp. 1618-1627, Dec. 2002.
    • (2002) IEEE J. Solid-State Circuits , vol.37 , Issue.12 , pp. 1618-1627
    • Jamal, S.M.1    Fu, D.2    Chang, N.C.-J.3    Hurst, P.J.4    Lewis, S.H.5
  • 12
    • 0031617473 scopus 로고    scopus 로고
    • "An analog DFE for disk drives using a mixed-signal integrator"
    • Jun
    • M. Q. Le, P. J. Hurst, and K. C. Dyer, "An analog DFE for disk drives using a mixed-signal integrator," in Proc. Symp. VLSI, Jun. 1998, pp. 156-157.
    • (1998) Proc. Symp. VLSI , pp. 156-157
    • Le, M.Q.1    Hurst, P.J.2    Dyer, K.C.3
  • 13
    • 0031706867 scopus 로고    scopus 로고
    • "Analog background calibration of a 10b 40 MSample/s parallel pipelined adc"
    • Feb
    • K. Dyer, D. Fu, S. Lewis, and P. Hurst, "Analog background calibration of a 10b 40 MSample/s parallel pipelined adc," in Proc. ISSCC, Feb. 1998, pp. 142-427.
    • (1998) Proc. ISSCC , pp. 142-427
    • Dyer, K.1    Fu, D.2    Lewis, S.3    Hurst, P.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.