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Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, CICC 2007

Volumn , Issue , 2007, Pages 333-336

A 43 mW single-channel 4GS/s 4-bit flash ADC in 0.18 μm CMOS

(3) Sheikhaei, Samad a Mirabbasi, Shahriar a Ivanov, André a

a UNIVERSITY OF BRITISH COLUMBIA (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

FIGURE OF MERITS; FULLY PIPELINED; LOGIC FUNCTIONS; LOW POWER; RESISTOR LADDER; SINGLE CHANNELS; SMALL AREA; WIRING DELAY;

INTEGRATED CIRCUITS;

EID: 79960665541 PISSN: None EISSN: None Source Type: Conference Proceeding
DOI: 10.1109/CICC.2007.4405746 Document Type: Conference Paper

Times cited : (28)

References (8)

1
- 4544381394
- A 4GS/s 6b Hash ADC in 0. 13um CMOS
- June
- C. Paulus, H. M. Bluthgen, M. Low, E. Sicheneder, N. Briils, A. Courtois, M. Tiebout, and R. Thewes, "A 4GS/s 6b Hash ADC in 0. 13um CMOS, " Symp. VLSI Circuits Dig. Tech. Papers, pp. 420-423, June 2004.
- (2004) Symp. VLSI Circuits Dig. Tech. Papers , pp. 420-423
- Paulus, C.¹ Bluthgen, H.M.² Low, M.³ Sicheneder, E.⁴ Briils, N.⁵ Courtois, A.⁶ Tiebout, M.⁷ Thewes, R.⁸

2
- 34547340201
- A 4GS/s 4b Flash ADC in 0. 18um CMOS
- Feb.
- S. Park, Y. Palaskas, and M. P. Flynn, "A 4GS/s 4b Flash ADC in 0. 18um CMOS, " ISSCCDig. Tech. Papers, pp. 570-571, Feb. 2006.
- (2006) ISSCCDig. Tech. Papers , pp. 570-571
- Park, S.¹ Palaskas, Y.² Flynn, M.P.³

3
- 0030411456
- An 80-MHz, 80-mW, 8-b CMOS Folding A/D Converter with Distributed Track-and-Hold Preprocessing
- Dec.
- A. G. W. Venes and RJ. van de Plassche, "An 80-MHz, 80-mW, 8-b CMOS Folding A/D Converter with Distributed Track-and-Hold Preprocessing, " IEEE J. Solid-State Circuits, vol. 31, pp. 1846-1853, Dec. 1996.
- (1996) IEEE J. Solid-State Circuits , vol.31 , pp. 1846-1853
- Venes, A.G.W.¹ De Van, R.J.P.²

4
- 0003504282
- IEEE Press
- B. Razavi, Principles of Data Conversion System Design, IEEE Press, 1995
- (1995) Principles of Data Conversion System Design
- Razavi, B.¹

5
- 28444496649
- A 0. 18um CMOS Pipelined Encoder for a 5GS/s 4-Bit Flash Analogue-to-Digital Converter
- Fall
- S. Sheikhaei, S. Mirabbasi, and A. Ivanov, "A 0. 18um CMOS Pipelined Encoder for a 5GS/s 4-Bit Flash Analogue-to-Digital Converter, " IEEE Canadian lournal of Electrical and Computer Engineering, Vol. 30, Issue 4, Fall 2005, pp. 183-187.
- (2005) IEEE Canadian Lournal of Electrical and Computer Engineering , vol.30 , Issue.4 , pp. 183-187
- Sheikhaei, S.¹ Mirabbasi, S.² Ivanov, A.³

6
- 0346342442
- A 40-GHz-Bandwidth, 4-Bit, Time-Interleaved A/D Converter Using Photoconductive Sampling
- Dec.
- L. Y. Nathawad, R. Urata, B. A. Wooley, and D. A. B. Miller, "A 40-GHz-Bandwidth, 4-Bit, Time-Interleaved A/D Converter Using Photoconductive Sampling, " IEEE I. Solid-State Circuits, vol. 38, pp. 2021-2030, Dec. 2003
- (2003) IEEE I. Solid-State Circuits , vol.38 , pp. 2021-2030
- Nathawad, L.Y.¹ Urata, R.² Wooley, B.A.³ Miller, D.A.B.⁴

7
- 39049083870
- A 3. 5GS/s 5-b Flash ADC in 90nm CMOS
- Sep.
- S. Park, Y. Palaskas, A. Ravi, R. E. Bishop, and M. P. Flynn, "A 3. 5GS/s 5-b Flash ADC in 90nm CMOS, " IEEE Custom Integrated Circuit Conference, pp. 489-92, Sep. 2006.
- (2006) IEEE Custom Integrated Circuit Conference , pp. 489-92
- Park, S.¹ Palaskas, Y.² Ravi, A.³ Bishop, R.E.⁴ Flynn, M.P.⁵

8
- 2442692681
- A 6b 600MHz lOmW ADC Array in Digital 90nm CMOS
- Feb.
- D. Draxelmayr, "A 6b 600MHz lOmW ADC Array in Digital 90nm CMOS, " ISSCC Dig. Tech. Papers, pp. 264-265, Feb. 2004.
- (2004) ISSCC Dig. Tech. Papers , pp. 264-265
- Draxelmayr, D.¹

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.