A 6b 600MHz 10mW ADC array in digital 90nm CMOS

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 47, Issue , 2004, Pages

  Draxelmayr, Dieter ^a  

^a INFINEON TECHNOLOGIES AUSTRIA AG   (Austria)

Author keywords

[No Author keywords available]

Indexed keywords

LOW JITTER OPERATION; POWER CONSUMPTION; SPURIOUS TONES;

ALGORITHMS; BUFFER STORAGE; CALIBRATION; CAPACITORS; CMOS INTEGRATED CIRCUITS; COMPUTER ARCHITECTURE; DATA ACQUISITION; DIFFERENTIAL AMPLIFIERS; RANDOM ACCESS STORAGE;

ANALOG TO DIGITAL CONVERSION;

EID: 2442692681     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. P. Scholtens and M. Vertregt, "A 6b 1.6GSample/s Flash ADC in 0.18μm CMOS using Averaging Termination," ISSCC Dig. Tech. Papers, pp. 168-169, Feb. 2002
2. 2," ISSCC Dig. Tech. Papers, pp. 170-171, Feb. 2002.
3. F. Kuttner: "A 1.2V 10b 20MSample/s Non-Binary Successive Approximation ADC in 0.13μm CMOS," ISSCC Dig. Tech. Papers, pp. 176-177, Feb. 2002.
4. J. Lin and B Haroun, "An Embedded 0.8V/480μW 6b/22MHz Flash ADC in 0.13μm Digital CMOS Process using Nonlinear Double-Interpolation Technique," ISSCC Dig. Tech. Papers, pp. 308-309, Feb. 2002.
5. R. Reuteman et al, "A 33mW 14b 2.5MSample/s SD A/D Converter in 0.25μm Digital CMOS," ISSCC Dig. Tech. Papers, pp. 316-317, Feb. 2002
6. J. Sauerbrey et al., "A 0.5V, 1μW Successive Approximation ADC," Proceedings of the 28th European Solid-State Circuit Conference, pp. 247-250, Sept. 2002.