Low-power, high-speed transceivers for network-on-chip communication

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 17, Issue 1, 2009, Pages 12-21

  Schinkel, Daniël ^a   Mensink, Eisse ^b   Klumperink, Eric A M ^c   Van Tuijl, Ed ^a,c   Nauta, Bram ^c  

^a Axiom IC Twente   (Netherlands)

^b University of Twente ^*

^c UNIVERSITY OF TWENTE   (Netherlands)

Author keywords

Capacitive pre emphasis transmitter; Globally asynchronous, locally synchronous (GALS); Interconnect; Low power design; Low swing; Network on chip (NoC); On chip communication; Source synchronous; Wave pipelining

Indexed keywords

DIFFERENTIAL AMPLIFIERS; FAULT TREE ANALYSIS; INTEGRATED CIRCUIT DESIGN; INTEGRATED CIRCUIT INTERCONNECTS; INTERCONNECTION NETWORKS (CIRCUIT SWITCHING); LIQUID LASERS; OPTICAL TRANSCEIVERS; POWER ELECTRONICS; RADIO TRANSCEIVERS; SURFACE EMITTING LASERS;

CAPACITIVE PRE-EMPHASIS TRANSMITTER; GLOBALLY ASYNCHRONOUS LOCALLY SYNCHRONOUS; GLOBALLY ASYNCHRONOUS, LOCALLY SYNCHRONOUS; INTERCONNECT; LOW SWING; LOW-POWER DESIGN; NETWORK ON CHIP; NETWORKS ON CHIPS; ON CHIP COMMUNICATION; SOURCE SYNCHRONOUS; WAVE-PIPELINING;

NETWORK-ON-CHIP;

EID: 58849136152     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2008.2001949     Document Type: Article

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