Optimal positions of twists in global on-chip differential interconnects

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 15, Issue 4, 2007, Pages 438-446

  Mensink, Eisse ^a,b   Schinkel, Daniel ^a,b   Klumperink, Eric A M ^a,b   Van Tuijl, Ed ^a,b   Nauta, Bram ^a,b  

^a IEEE   (Netherlands)

^b UNIVERSITY OF TWENTE   (Netherlands)

Author keywords

Crosstalk; Data bus; Interconnect; On chip communication; Twists

Indexed keywords

CROSSTALKS; DATA BUS; NOISE SOURCES; ON CHIP COMMUNICATION;

CMOS INTEGRATED CIRCUITS; ELECTRIC LOADS; ELECTRIC POWER UTILIZATION; MICROPROCESSOR CHIPS; SPURIOUS SIGNAL NOISE;

INTERCONNECTION NETWORKS;

EID: 34247611547     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2007.893661     Document Type: Article

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