Low-swing on-chip signaling techniques: effectiveness and robustness

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 8, Issue 3, 2000, Pages 264-272

  Zhang, Hui ^a,b   George, Varghese ^a,b   Rabaey, Jan M ^a,b  

^a IEEE   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ON-CHIP INTERCONNECT SCHEMES; SIGNAL INTEGRITY;

COMPUTER SIMULATION; DIGITAL INTEGRATED CIRCUITS; ELECTRIC POWER SUPPLIES TO APPARATUS; SEMICONDUCTOR DEVICE TESTING; SIGNAL TO NOISE RATIO;

CMOS INTEGRATED CIRCUITS;

EID: 0033704034     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/92.845893     Document Type: Article

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