Fabrication of metal gated FinFETs through complete gate silicidation with Ni

IEEE Transactions on Electron Devices

Volumn 51, Issue 12, 2004, Pages 2115-2120

  Kedzierski, Jakub ^a   Ieong, Meikei ^b   Kanarsky, Thomas ^b   Zhang, Ying ^a   Wong, H S Philip ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

^b IBM MICROELECTRONICS   (United States)

Author keywords

Double gate (DG); FinFET; Fully silicided (FUSI); Gate workfunction; Metal gate; NiSi; Silicidation; Silicide gate; Thin body; Transistor scaling; Ultrathin body; Undoped body; Workfunction engineering

Indexed keywords

CARRIER MOBILITY; GATES (TRANSISTOR); PHOTOLITHOGRAPHY; SEMICONDUCTOR DEVICE MANUFACTURE; SILICON ON INSULATOR TECHNOLOGY; SILICON WAFERS; THRESHOLD VOLTAGE; VOLTAGE CONTROL;

DOUBLE GATE TRANSISTORS; GATE WORKFUNCTION; SILICIDATION; SILICIDE GATE; TRANSISTOR SCALING; ULTRATHIN BODY; WORKFUNCTION ENGINEERING;

FIELD EFFECT TRANSISTORS;

EID: 10644230219     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2004.838448     Document Type: Article

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