Photonic networks-on-chip for future generations of chip multiprocessors

IEEE Transactions on Computers

Volumn 57, Issue 9, 2008, Pages 1246-1260

  Shacham, Assaf ^a   Bergman, Keren ^b   Carloni, Luca P ^b  

^a Aprius Inc   (United States)

^b Department of Earth and Environmental Sciences   (United States)

Author keywords

Chip multiprocessors; Emerging technologies; On chip communication; Photonics

Indexed keywords

BIOLOGICAL MATERIALS; ELECTRIC NETWORK TOPOLOGY; MICROPROCESSOR CHIPS; MULTIPROCESSING SYSTEMS; NANOTECHNOLOGY; POWER GENERATION; SWITCHING CIRCUITS; SYSTEMS ANALYSIS; TELECOMMUNICATION SYSTEMS;

CHIP MULTIPROCESSORS; CIRCUIT-SWITCHED; CONTROL NETWORKS; CRITICAL DESIGN; DEADLOCK AVOIDANCE; EMERGING TECHNOLOGIES; FUTURE GENERATIONS; MICRO ARCHITECTURES; OFF-CHIP COMMUNICATION; ON CHIPS; ON-CHIP COMMUNICATION; OVERALL POWER; PACKET-SWITCHED; PHOTONIC; PHOTONIC COMMUNICATION; PHOTONIC NETWORKS; PHOTONICS; POWER ANALYSIS; POWER DISSIPATIONS;

ROUTING ALGORITHMS;

EID: 49149095791     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.2008.78     Document Type: Article

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