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Volumn 25, Issue 2, 2005, Pages 21-29
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Niagara: A 32-way multithreaded sparc processor
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Author keywords
[No Author keywords available]
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Indexed keywords
BUFFER STORAGE;
CACHE MEMORY;
COMPUTER ARCHITECTURE;
DATA STORAGE EQUIPMENT;
PIPELINE PROCESSING SYSTEMS;
SERVERS;
INTEGER REGISTER FILE;
MULTITHREADED SPARC PROCESSOR;
SPARC PIPELINE;
TRANSLATION LOOK ASIDE BUFFERS;
MICROPROCESSOR CHIPS;
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EID: 20344374162
PISSN: 02721732
EISSN: None
Source Type: Journal
DOI: 10.1109/MM.2005.35 Document Type: Article |
Times cited : (670)
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References (7)
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