-
2
-
-
0035423685
-
RF-CMOS performance trends
-
Woerlee P H, Knitel M J, van Langevelde R, Klaassen D B M, Tiemeijer L F, Scholten A J and Duijnhoven A T A Z V 2001 RF-CMOS performance trends Electron Devices 48 1776-82
-
(2001)
Electron Devices
, vol.48
, Issue.8
, pp. 1776-1782
-
-
Woerlee, P.H.1
Knitel, M.J.2
Van Langevelde, R.3
Klaassen, D.B.M.4
Tiemeijer, L.F.5
Scholten, A.J.6
Duijnhoven, A.T.A.Z.V.7
-
4
-
-
0036508039
-
Beyond the conventional transistor
-
Wong H S P 2003 Beyond the conventional transistor IBM J. Res. Dev. 46 133-68
-
(2003)
IBM J. Res. Dev.
, vol.46
, pp. 133-168
-
-
Wong, H.S.P.1
-
5
-
-
0038546631
-
Ultimately thin double-gate SOI MOSFETs
-
Ernst T, Cristoloveanu S, Ghibaudo G, Ouisse T, Horiguchi S, Ono Y, Takahashi Y and Murase K 2003 Ultimately thin double-gate SOI MOSFETs IEEE Trans. Electron Devices 50 830-8
-
(2003)
IEEE Trans. Electron Devices
, vol.50
, Issue.3
, pp. 830-838
-
-
Ernst, T.1
Cristoloveanu, S.2
Ghibaudo, G.3
Ouisse, T.4
Horiguchi, S.5
Ono, Y.6
Takahashi, Y.7
Murase, K.8
-
6
-
-
0036923438
-
FinFET scaling to 10 nm gate length
-
Yu B et al 2002 FinFET scaling to 10 nm gate length IEDM Tech. Dig. pp 251-4
-
(2002)
IEDM Tech. Dig.
, pp. 251-254
-
-
Yu, B.1
-
7
-
-
17644439016
-
Highly performant double gate MOSFET realized with SON process
-
Harrison S et al 2003 Highly performant double gate MOSFET realized with SON process IEDM Tech. Dig. 449-52
-
(2003)
IEDM Tech. Dig.
, pp. 449-452
-
-
Harrison, S.1
-
10
-
-
46049117875
-
Advanced FinFET CMOS technology: TiN-gate, fin-height control and asymmetric gate insulator thickness 4T-FinFETs
-
Liu Y, Matsukaw T, Endo K, Masahara M, Ishii K, O'uchi S, Yamauchi H, Tsukada J, Ishikawa Y and Suzuki E 2006 Advanced FinFET CMOS technology: TiN-gate, fin-height control and asymmetric gate insulator thickness 4T-FinFETs IEDM Tech. Dig. 1-4
-
(2006)
IEDM Tech. Dig.
, pp. 1-4
-
-
Liu, Y.1
Matsukaw, T.2
Endo, K.3
Masahara, M.4
Ishii, K.5
O'Uchi, S.6
Yamauchi, H.7
Tsukada, J.8
Ishikawa, Y.9
Suzuki, E.10
-
11
-
-
33646023723
-
Analog/RF performance of multiple gate SOI devices: Wideband simulations and characterization
-
Raskin J-P, Tsung M C, Kilchytska V, Lederer D and Flandre D 2006 Analog/RF performance of multiple gate SOI devices: wideband simulations and characterization IEEE Trans. Electron Devices 53 1088-95
-
(2006)
IEEE Trans. Electron Devices
, vol.53
, Issue.5
, pp. 1088-1095
-
-
Raskin, J.-P.1
Tsung, M.C.2
Kilchytska, V.3
Lederer, D.4
Flandre, D.5
-
12
-
-
29244451571
-
Analog performance of double gate SOI transistors
-
Alam M S, Lim T C and Armstrong G 2006 Analog performance of double gate SOI transistors Int. J. Electron. 93 1-18
-
(2006)
Int. J. Electron.
, vol.93
, Issue.1
, pp. 1-18
-
-
Alam, M.S.1
Lim, T.C.2
Armstrong, G.3
-
13
-
-
33744946793
-
The impact of the intrinsic and extrinsic resistances of double gate SOI on RF performance
-
Lim T C and Armstrong G 2006 The impact of the intrinsic and extrinsic resistances of double gate SOI on RF performance Solid-State Electron. 50 774-83
-
(2006)
Solid-State Electron.
, vol.50
, Issue.5
, pp. 774-783
-
-
Lim, T.C.1
Armstrong, G.2
-
15
-
-
21244503871
-
Analysis of static and dynamic performance of short-channel double gate silicon-on-insulator metal-oxide-semiconductor field-effect transistors for improved cutoff frequency
-
Kranti A, Chung T M and Raskin J-P 2005 Analysis of static and dynamic performance of short-channel double gate silicon-on-insulator metal-oxide-semiconductor field-effect transistors for improved cutoff frequency Japan. J. Appl. Phys. 44 2340-6
-
(2005)
Japan. J. Appl. Phys.
, vol.44
, pp. 2340-2346
-
-
Kranti, A.1
Chung, T.M.2
Raskin, J.-P.3
-
16
-
-
33646088366
-
Engineering source/drain extension regions in nanoscale double gate (DG) SOI MOSFETs: Analytical model and design considerations
-
Kranti A and Armstrong G 2006 Engineering source/drain extension regions in nanoscale double gate (DG) SOI MOSFETs: analytical model and design considerations Solid-State Electron. 50 437-47
-
(2006)
Solid-State Electron.
, vol.50
, Issue.3
, pp. 437-447
-
-
Kranti, A.1
Armstrong, G.2
-
17
-
-
33847367048
-
Source/drain extension region engineering in FinFETs for low-voltage analog applications
-
Kranti A and Armstrong G 2007 Source/drain extension region engineering in FinFETs for low-voltage analog applications IEEE Electron Devices Lett. 28 139-41
-
(2007)
IEEE Electron Devices Lett.
, vol.28
, Issue.2
, pp. 139-141
-
-
Kranti, A.1
Armstrong, G.2
-
18
-
-
34247473409
-
Comparative analysis of nanoscale MOS device architectures for RF applications
-
Kranti A and Armstrong G 2007 Comparative analysis of nanoscale MOS device architectures for RF applications Semicond. Sci. Technol. 22 481-91
-
(2007)
Semicond. Sci. Technol.
, vol.22
, Issue.5
, pp. 481-491
-
-
Kranti, A.1
Armstrong, G.2
-
19
-
-
25844498484
-
FinFET analogue characterization from DC to 110 GHz
-
Lederer D, Kilchytska V, Rudenko T, Collaert N, Flandre D, Dixit A, De Meyer K and Raskin J P 2005 FinFET analogue characterization from DC to 110 GHz Solid-State Electron. 49 1488-96
-
(2005)
Solid-State Electron.
, vol.49
, Issue.9
, pp. 1488-1496
-
-
Lederer, D.1
Kilchytska, V.2
Rudenko, T.3
Collaert, N.4
Flandre, D.5
Dixit, A.6
De Meyer, K.7
Raskin, J.P.8
-
20
-
-
0036772198
-
Off-leakage and drive current characteristics of sub-100-nm SOI MOSFETs and impact of quantum tunnel current
-
Nakajima H, Yanagi S, Komiya K and Omura Y 2002 Off-leakage and drive current characteristics of sub-100-nm SOI MOSFETs and impact of quantum tunnel current IEEE Trans. Electron Devices 49 1775-82
-
(2002)
IEEE Trans. Electron Devices
, vol.49
, Issue.10
, pp. 1775-1782
-
-
Nakajima, H.1
Yanagi, S.2
Komiya, K.3
Omura, Y.4
-
21
-
-
33846050832
-
The role of volume inversion on the intrinsic RF performance of double-gate FinFETs
-
Curatola G and Nuttinck S 2007 The role of volume inversion on the intrinsic RF performance of double-gate FinFETs IEEE Trans. Electron Devices 54 141-50
-
(2007)
IEEE Trans. Electron Devices
, vol.54
, Issue.1
, pp. 141-150
-
-
Curatola, G.1
Nuttinck, S.2
-
22
-
-
33744903631
-
RF and noise performance of double gate and single gate SOI
-
Lazaro A and Iniguezet B 2006 RF and noise performance of double gate and single gate SOI Solid-State Electron. 50 826-42
-
(2006)
Solid-State Electron.
, vol.50
, Issue.5
, pp. 826-842
-
-
Lazaro, A.1
Iniguezet, B.2
-
23
-
-
21044447633
-
On the feasibility of nanoscale triple-gate CMOS transistors
-
Yang J W and Fossum J G 2005 On the feasibility of nanoscale triple-gate CMOS transistors IEEE Trans. Electron Devices 52 1159-64
-
(2005)
IEEE Trans. Electron Devices
, vol.52
, Issue.6
, pp. 1159-1164
-
-
Yang, J.W.1
Fossum, J.G.2
-
25
-
-
43149110196
-
-
User's Manual for ISE TCAD 8.0
-
User's Manual for ISE TCAD 8.0
-
-
-
-
26
-
-
0034454471
-
Low field mobility of ultra-thin SOI N- and P-MOSFETs: Measurements and implications on the performance of ultra-short MOSFETs
-
Esseni D, Mastrapasqua M, Celler G K, Baumann F H, Fiegna C, Selmi L and Sangiorgi E 2000 Low field mobility of ultra-thin SOI N- and P-MOSFETs: measurements and implications on the performance of ultra-short MOSFETs IEDM Tech. Dig. 671-4
-
(2000)
IEDM Tech. Dig.
, pp. 671-674
-
-
Esseni, D.1
Mastrapasqua, M.2
Celler, G.K.3
Baumann, F.H.4
Fiegna, C.5
Selmi, L.6
Sangiorgi, E.7
-
27
-
-
0037600562
-
What are the limiting parameters of deep-submicron MOSFETs for high frequency applications?
-
Dambrine G, Raynaud C, Lederer D, Dehan M, Rozeaux O, Vanmackelberg M, Danneville F, Lepilliet S and Raskin J P 2003 What are the limiting parameters of deep-submicron MOSFETs for high frequency applications? IEEE Electron Devices Lett. 24 189-91
-
(2003)
IEEE Electron Devices Lett.
, vol.24
, Issue.3
, pp. 189-191
-
-
Dambrine, G.1
Raynaud, C.2
Lederer, D.3
Dehan, M.4
Rozeaux, O.5
Vanmackelberg, M.6
Danneville, F.7
Lepilliet, S.8
Raskin, J.P.9
-
28
-
-
13344270339
-
Modeling and optimization of fringe capacitance of nanoscale DGMOS devices
-
Bansal A, Paul B C and Roy K 2005 Modeling and optimization of fringe capacitance of nanoscale DGMOS devices IEEE Trans. Electron Devices 52 256-62
-
(2005)
IEEE Trans. Electron Devices
, vol.52
, Issue.2
, pp. 256-262
-
-
Bansal, A.1
Paul, B.C.2
Roy, K.3
-
29
-
-
18744405688
-
Study of the extrinsic parasitics in nano-scale transistors
-
Xiong S, King T-J and Bokor J 2005 Study of the extrinsic parasitics in nano-scale transistors Semicond. Sci. Technol. 20 652-7
-
(2005)
Semicond. Sci. Technol.
, vol.20
, Issue.6
, pp. 652-657
-
-
Xiong, S.1
King, T.-J.2
Bokor, J.3
-
30
-
-
0037480885
-
Extension and source/drain design for high-performance FinFET devices
-
Kedzierski J, Ieong M, Nowak E, Kanarsky T S, Zhang Y, Roy R, Boyd D, Fried D and Wong H S P 2003 Extension and source/drain design for high-performance FinFET devices IEEE Trans. Electron Devices 50 952-8
-
(2003)
IEEE Trans. Electron Devices
, vol.50
, Issue.4
, pp. 952-958
-
-
Kedzierski, J.1
Ieong, M.2
Nowak, E.3
Kanarsky, T.S.4
Zhang, Y.5
Roy, R.6
Boyd, D.7
Fried, D.8
Wong, H.S.P.9
-
31
-
-
34547688875
-
RF transistors: Recent developments and roadmap toward terahertz applications
-
Schwierz F and Liou J J 2007 RF transistors: recent developments and roadmap toward terahertz applications Solid-State Electron 51 1079-91
-
(2007)
Solid-State Electron
, vol.51
, Issue.8
, pp. 1079-1091
-
-
Schwierz, F.1
Liou, J.J.2
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