Speed superiority of scaled double-gate CMOS

IEEE Transactions on Electron Devices

Volumn 49, Issue 5, 2002, Pages 808-811

  Fossum, Jerry G ^a,b   Ge, Lixin ^a,b   Chiang, Meng Hsueh ^a,c  

^a IEEE   (United States)

^b University of Florida   (United States)

^c ADVANCED MICRO DEVICES   (United States)

Author keywords

CMOS modeling; Double gate MOSFETs; Gate capacitance; On state current; Propagation delay

Indexed keywords

DOUBLE GATE CMOS; GATE CAPACITANCE; ON STATE CURRENT; PROPAGATION DELAY; RING OSCILLATOR; SHORT CHANNEL EFFECT;

CAPACITANCE; CARRIER CONCENTRATION; COMPUTER SIMULATION; DOPING (ADDITIVES); ELECTRIC POTENTIAL; GATES (TRANSISTOR); MONTE CARLO METHODS; MOSFET DEVICES; OSCILLATORS (ELECTRONIC); POLYSILICON; SHORT CIRCUIT CURRENTS;

CMOS INTEGRATED CIRCUITS;

EID: 0036564015     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.998588     Document Type: Article

References (12)

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