Analytical HFET I-V model in presence of current collapse

IEEE Transactions on Electron Devices

Volumn 55, Issue 3, 2008, Pages 712-720

  Koudymov, Alexei ^a   Shur, Micheal S ^a   Simin, Grigory ^b   Chu, Kanin ^c   Chao, Pane C ^c   Lee, Cathy ^d   Jimenez, Jose ^d   Balistreri, Anthony ^d  

^a RENSSELAER POLYTECHNIC INSTITUTE   (United States)

^b UNIVERSITY OF SOUTH CAROLINA   (United States)

^c BAE SYSTEMS   (United States)

^d TRIQUINT SEMICONDUCTOR   (United States)

Author keywords

Compact model; Current collapse; GaN; HEMT

Indexed keywords

CHARGE DISTRIBUTION; CHARGE TRAPPING; ELECTRIC FIELDS; GALLIUM NITRIDE; MATHEMATICAL MODELS;

CURRENT COLLAPSE; GATE-TO-DRAIN SPACING REGION;

HIGH ELECTRON MOBILITY TRANSISTORS;

EID: 40949125701     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2007.915092     Document Type: Article

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