The design of high-performance dynamic asynchronous pipelines: High-capacity style

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 15, Issue 11, 2007, Pages 1270-1283

  Singh, Montek ^a   Nowick, Steven M ^b  

^a Brooks Computer Science Building   (United States)

^b Columbia University ^*  (United States)

Author keywords

Asynchronous; Dynamic logic; Elastic pipelining; Fully decoupled; Gate level pipelines; High capacity; Latch controllers; Micropipelines; Pipeline processing; Precharge logic

Indexed keywords

ASYNCHRONOUS MACHINERY; CONCURRENT ENGINEERING; FABRICATION; FLIP FLOP CIRCUITS; THROUGHPUT; WAVE FILTERS;

DYNAMIC LOGIC; ELASTIC PIPELINING; FULLY DECOUPLED; GATE-LEVEL PIPELINES; HIGH-CAPACITY (HC) PIPELINES; LATCH CONTROLLERS; MICROPIPELINES; PRECHARGE LOGIC;

PIPELINE PROCESSING SYSTEMS;

EID: 35448967798     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2007.902206     Document Type: Article

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