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Volumn 1998-March, Issue , 1998, Pages 96-107

An asynchronous low-power 80C51 microcontroller

Author keywords

[No Author keywords available]

Indexed keywords

ASYNCHRONOUS SEQUENTIAL LOGIC; CONTROLLERS; INTEGRATED CIRCUIT DESIGN; VLSI CIRCUITS;

EID: 84949247171     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASYNC.1998.666497     Document Type: Conference Paper
Times cited : (109)

References (10)
  • 6
    • 0003418582 scopus 로고    scopus 로고
    • PhD thesis, Department of Mathematics and Computing Science, EindhovenUniversity of Technology
    • Ad M.G. Peeters. Single-Rail Handshake Circuits. PhD thesis, Department of Mathematics and Computing Science, EindhovenUniversity of Technology, 1996.
    • (1996) Single-Rail Handshake Circuits
    • Ad, M.G.1    Peeters2
  • 7
    • 0031192292 scopus 로고    scopus 로고
    • Low-power design of 8-b embedded coolrisc microcontroller cores
    • Christian Piguet, et al. Low-power design of 8-b embedded coolrisc microcontroller cores. IEEE Journal of Solid-State Circuits, 32(7):1067-1078, 1997.
    • (1997) IEEE Journal of Solid-State Circuits , vol.32 , Issue.7 , pp. 1067-1078
    • Piguet, C.1
  • 10
    • 0029213957 scopus 로고
    • A single-rail re-implementation of a DCC error detector using a generic standard-cell library
    • IEEE Computer Society Press, May
    • Kees van Berkel, Ronan Burgess, Joep Kessels, Ad Peeters, Marly Roncken, Frits Schalij, Rik van de Wiel. A single-rail re-implementation of a DCC error detector using a generic standard-cell library. In AsynchronousDesign Methodologies, pages 72-79. IEEE Computer Society Press, May 1995.
    • (1995) AsynchronousDesign Methodologies , pp. 72-79
    • Berkel, K.V.1    Burgess, R.2    Kessels, J.3    Peeters, A.4    Roncken, M.5    Schalij, F.6    Wiel, R.V.7


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.