Fine-grain pipelined asynchronous adders for high-speed DSP applications

Proceedings - IEEE Computer Society Workshop on VLSI 2000: System Design for a System-on-Chip Era, IWV 2000

Volumn , Issue , 2000, Pages 111-118

  Singh, M ^a   Nowick, S M ^a  

^a Department of Earth and Environmental Sciences   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; CMOS INTEGRATED CIRCUITS; PIPELINES; THROUGHPUT;

ASYNCHRONOUS PIPELINE; DECOUPLED CONTROL; DSP APPLICATION; GIGA-OPERATIONS PER SECONDS; HIGH THROUGHPUT; MODERN TECHNOLOGIES; MULTIMEDIA PROCESSING; PIPELINE SCHEME;

ADDERS;

EID: 84961967572     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IWV.2000.844538     Document Type: Conference Paper

References (13)

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