VLSI system design using asynchronous wave pipelines: A 0.35 μm CMOS 1.5 GHz elliptic curve public key cryptosystem chip

Proceedings - International Symposium on Asynchronous Circuits and Systems

Volumn , Issue , 2000, Pages 188-197

  Hauck, O ^a   Katoch, A ^a   Huss, S A ^a  

^a DARMSTADT UNIVERSITY OF TECHNOLOGY   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ASYNCHRONOUS CONTROLLERS; ASYNCHRONOUS WAVES; CIRCUIT LEVELS; CIRCUIT STYLES; CMOS PROCESSS; CRYPTO CHIPS; DATA PATHS; DESIGN CHALLENGES; DIFFERENT FREQUENCY; ELLIPTIC CURVE; FINITE FIELD MULTIPLIERS; HIERARCHICAL CONTROL; LOGIC STYLE; PUBLIC KEY CRYPTOSYSTEMS; PUBLIC KEYS; TIMING ANALYSIS; VLSI SYSTEM DESIGN; WAVE PIPELINE; WAVE-PIPELINING;

CMOS INTEGRATED CIRCUITS; DESIGN; PIPELINES; PUBLIC KEY CRYPTOGRAPHY;

VLSI CIRCUITS;

EID: 77953005154     PISSN: 15228681     EISSN: None     Source Type: Journal    
DOI: 10.1109/ASYNC.2000.837014     Document Type: Article

References (7)

1. O. Hauck, M. Garg, and S. A. Huss, "Efficient and Safe Asynchronous Wave-Pipeline Architectures for Datapath and Control Unit Applications, " Proceedings 9th Great Lakes Symposium on VLSI, pp. 38-41, Ann Arbor, March 1999
2. O. Hauck, M. Garg, and S. A. Huss, "Two-Phase Asynchronous Wave-Pipelines and their Application to a 2D-DCT, " Proceedings Fifth International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC), pp. 219-228, Barcelona, April 1999
3. C. Gray, W. Liu, and R. Cavin, Wave Pipelining: Theory and CMOS Implementation, Kluwer, 1994
4. W. Hwang et al., "Implementation of a Self-Resetting CMOS 64-bit Parallel Adder with Enhanced Testability, " IEEE J. of Solid-State Circuits, pp. 1108-1117, August 1999
5. O. Hauck and S. A. Huss, "Circuit Design for SRCMOS Asynchronous Wave Pipelines, " 4th Asynchronous Circuit Design Workshop (ACiD 2000), Grenoble, February 2000
6. N. Koblitz, "Elliptic Curve CryptoSystems, " Mothematics of Computation, 48 (1987), pp. 203-209
7. 2155 for Elliptic Curve Cryptosystems, " Proc. Asia Pacific Conference on Circuits and Systems, pp. 647-650, 1998