A domain-specific on-chip network design for large scale cache systems

Proceedings - International Symposium on High-Performance Computer Architecture

Volumn , Issue , 2007, Pages 318-327

  Jin, Yuho ^a   Kim, Eun Jung ^a   Yum, Ki Hwan ^b  

^a TEXAS A AND M UNIVERSITY   (United States)

^b One UTSA Circle   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CIRCUIT INTEGRATION TECHNOLOGY; LARGE SCALE CACHE SYSTEMS; NETWORK RESOURCES; ON-CHIP NETWORK;

ALGORITHMS; CACHE MEMORY; COMPUTER ARCHITECTURE; LARGE SCALE SYSTEMS; MICROPROCESSOR CHIPS; OPTICAL INTERCONNECTS;

COMPUTER NETWORKS;

EID: 34547657571     PISSN: 15300897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HPCA.2007.346209     Document Type: Conference Paper

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