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Volumn 31, Issue , 2004, Pages 188-197
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Low-latency virtual-channel routers for on-chip networks
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Author keywords
[No Author keywords available]
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Indexed keywords
COMMUNICATION CHANNELS (INFORMATION THEORY);
COMPUTATIONAL COMPLEXITY;
COMPUTER ARCHITECTURE;
NETWORK PROTOCOLS;
OPTIMIZATION;
TELECOMMUNICATION NETWORKS;
WIRE;
CHIP-WIDE COMMUNICATIONS;
INTER-CHIP DESIGNS;
ON-CHIP NETWORKS;
SIGNAL INTEGRITY;
ROUTERS;
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EID: 4644301652
PISSN: 10636897
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (367)
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References (21)
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