A survey of hybrid techniques for functional verification

IEEE Design and Test of Computers

Volumn 24, Issue 2, 2007, Pages 112-122

  Bhadra, Jayanta ^a   Abadir, Magdy S ^a   Wang, Li C ^b   Ray, Sandip ^c  

^a FREESCALE SEMICONDUCTOR INC   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

^c University of Texas at Austin   (United States)

Author keywords

Formal techniques; Functional verification; Hybrid; Informal techniques

Indexed keywords

COMPUTER AIDED DESIGN; COMPUTER AIDED SOFTWARE ENGINEERING; COMPUTER HARDWARE; FORMAL METHODS;

FORMAL TECHNIQUES; FUNCTIONAL VERIFICATION; HYBRID TECHNIQUES; INFORMAL TECHNIQUES;

VERIFICATION;

EID: 34347387318     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/MDT.2007.30     Document Type: Article

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