An ultra-energy-efficient wide-bandwidth video pipeline ADC using optimized architectural partitioning

IEEE Transactions on Circuits and Systems I: Regular Papers

Volumn 53, Issue 12, 2006, Pages 2485-2497

  Adeniran, Olujide A ^a,b   Demosthenous, Andreas ^a  

^a UNIVERSITY COLLEGE LONDON   (United Kingdom)

^b Mirics Semiconductor Inc   (United Kingdom)

Author keywords

Analog to digital conversion; Digital video broadcast handheld (DVB H); Effective resolution bandwidth (ERBW); Low voltage circuits; Pipeline analog to digital converter (ADC); Power efficient ADC

Indexed keywords

BANDWIDTH; CMOS INTEGRATED CIRCUITS; PIPELINE PROCESSING SYSTEMS;

DIGITAL VIDEO BROADCAST-HANDHELD; EFFECTIVE RESOLUTION BANDWIDTH; LOW-VOLTAGE CIRCUITS; PIPELINE ANALOG-TO-DIGITAL CONVERTER;

ANALOG TO DIGITAL CONVERSION;

EID: 33845804814     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2006.885983     Document Type: Article

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