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Volumn 38, Issue 7, 2003, Pages 1266-1270

A multichannel pipeline analog-to-digital converter for an integrated 3-D ultrasound imaging system

Author keywords

Analog to digital converter (ADC); Mixed signal integrated circuits; Multichannel; Multiplexing; Pipeline analog to digital conversion; Switched capacitor circuits; Ultrasound imaging

Indexed keywords

CAPACITORS; CMOS INTEGRATED CIRCUITS; IMAGING TECHNIQUES; MULTIPLEXING; SIGNAL TO NOISE RATIO; ULTRASONICS;

EID: 0038155505     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2003.813294     Document Type: Article
Times cited : (23)

References (14)
  • 1
    • 0030296422 scopus 로고    scopus 로고
    • 3-D ultrasound imaging: A review
    • Nov.-Dec.
    • A. Fenster and D. Downey, "3-D ultrasound imaging: A review," IEEE Eng. Med. Biol., vol. 15, no. 6, pp. 41-51, Nov.-Dec. 1996.
    • (1996) IEEE Eng. Med. Biol. , vol.15 , Issue.6 , pp. 41-51
    • Fenster, A.1    Downey, D.2
  • 3
    • 0033310091 scopus 로고    scopus 로고
    • Simulation and experimental characterization of a 2-D capacitive micromachined ultrasonic transducer array element
    • Nov.
    • Ö. Oralkan, X. Jin, F. L. Degerlekin, and B. T. Khuri-Yakub, "Simulation and experimental characterization of a 2-D capacitive micromachined ultrasonic transducer array element," IEEE Trans. Ultrason. Ferroelect. Freq. Contr., vol. 46, pp. 1337-1340, Nov. 1999.
    • (1999) IEEE Trans. Ultrason. Ferroelect. Freq. Contr. , vol.46 , pp. 1337-1340
    • Oralkan, Ö.1    Jin, X.2    Degerlekin, F.L.3    Khuri-Yakub, B.T.4
  • 4
    • 0034579981 scopus 로고    scopus 로고
    • An efficient electrical addressing method using through-wafer vias for two-dimensional ultrasonic arrays
    • C.-H. Cheng, E. M. Chow, X. C. Jin, S. Ergun, and B. T. Khuri-Yakub, "An efficient electrical addressing method using through-wafer vias for two-dimensional ultrasonic arrays," in Proc. IEEE Ultrasonics Symp., 2000, pp. 1179-1182.
    • (2000) Proc. IEEE Ultrasonics Symp. , pp. 1179-1182
    • Cheng, C.-H.1    Chow, E.M.2    Jin, X.C.3    Ergun, S.4    Khuri-Yakub, B.T.5
  • 5
    • 0027576932 scopus 로고
    • A 8-b. 85-MS/s parallel pipeline A/D converter in 1-μm CMOS
    • Apr.
    • C. S. G. Conroy, D. W. Cline, and P. R. Gray, "A 8-b. 85-MS/s parallel pipeline A/D converter in 1-μm CMOS," IEEE J. Solid-Stale Circuits, vol. 28, pp. 447-454, Apr. 1993.
    • (1993) IEEE J. Solid-Stale Circuits , vol.28 , pp. 447-454
    • Conroy, C.S.G.1    Cline, D.W.2    Gray, P.R.3
  • 7
    • 0029269932 scopus 로고
    • A 10-b, 20-MSample/s, 35 mW pipeline A/D converter
    • Mar.
    • T. B. Cho and P. R. Gray, "A 10-b, 20-MSample/s, 35 mW pipeline A/D converter," IEEE J. Solid-State Circuits, vol. 30, pp. 166-172, Mar. 1995.
    • (1995) IEEE J. Solid-State Circuits , vol.30 , pp. 166-172
    • Cho, T.B.1    Gray, P.R.2
  • 8
    • 0030106088 scopus 로고    scopus 로고
    • A power optimized 13-b 5-Msamples/s pipelined analog-to-digital converter in 1.2-/Km CMOS
    • Mar.
    • D. W. Cline and P. R. Gray, "A power optimized 13-b 5-Msamples/s pipelined analog-to-digital converter in 1.2-/Km CMOS," IEEE J. Solid-State Circuits, vol. 31, pp. 294-303, Mar. 1996.
    • (1996) IEEE J. Solid-State Circuits , vol.31 , pp. 294-303
    • Cline, D.W.1    Gray, P.R.2
  • 9
    • 0026901915 scopus 로고
    • Optimizing the stage resolution in pipelined, multistage, analog-to-digital converters for video-rate applications
    • Aug.
    • S. H. Lewis, "Optimizing the stage resolution in pipelined, multistage, analog-to-digital converters for video-rate applications," IEEE Trans. Circuits Syst.II. vol. 39, pp. 516-523, Aug. 1992.
    • (1992) IEEE Trans. Circuits Syst. II , vol.39 , pp. 516-523
    • Lewis, S.H.1
  • 11
    • 0026141224 scopus 로고
    • A 13-b, 2.5-MHz self-calibrated pipelined A/D conveter in 3-μm CMOS
    • Apr.
    • Y.-M. Lin, B. Kim, and P. R. Gray, "A 13-b, 2.5-MHz self-calibrated pipelined A/D conveter in 3-μm CMOS," IEEE J. Solid-State Circuits, vol. 26, pp. 628-636, Apr. 1991.
    • (1991) IEEE J. Solid-State Circuits , vol.26 , pp. 628-636
    • Lin, Y.-M.1    Kim, B.2    Gray, P.R.3
  • 12
    • 0025568946 scopus 로고
    • A fast-settling CMOS op-amp for SC circuits with 90-dB DC gain
    • Dec.
    • K. Bull and G. J. G. M. Geelen, "A fast-settling CMOS op-amp for SC circuits with 90-dB DC gain," IEEE Trans. Circuits Syst. II, vol. 25, pp. 1379-1384, Dec. 1990.
    • (1990) IEEE Trans. Circuits Syst. II , vol.25 , pp. 1379-1384
    • Bull, K.1    Geelen, G.J.G.M.2
  • 13
    • 0028436831 scopus 로고
    • Systematic capacitance matching errors and corrective layout procedures
    • May
    • M. J. MCNutt, S. LeMarquis, and J. L. Dunkley, "Systematic capacitance matching errors and corrective layout procedures," IEEE J. Solid-State Circuits, vol. 29, pp. 611-616, May 1994.
    • (1994) IEEE J. Solid-State Circuits , vol.29 , pp. 611-616
    • McNutt, M.J.1    Lemarquis, S.2    Dunkley, J.L.3
  • 14


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.