A 28mW 10b 80MS/s pipelined ADC in 0.13μm CMOS

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 1, Issue , 2004, Pages

  Bogner, Peter ^a  

^a INFINEON TECHNOLOGIES AUSTRIA AG   (Austria)

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFIERS (ELECTRONIC); CAPACITORS; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC IMPEDANCE; ELECTRIC POTENTIAL; ELECTRIC POWER SUPPLIES TO APPARATUS; GAIN CONTROL; SIGNAL PROCESSING; VOLTMETERS;

DIGITAL CORRECTION LOGIC; LOW OPAMP COUNTS; MULTI BIT ARCHITECTURE; SIGNAL FREQUENCIES;

ANALOG TO DIGITAL CONVERSION;

EID: 4344600705     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. S. M. Yoo, T.H. Oh, J.W.Moon, S.H. Lee, and U.K. Moon, "A 2,5V 10b 120Msamples/s CMOS Pipelined ADC with high SFDR,"Proc. CICC, pp. 441-444, May 2002.
2. A.Abo and P.Gray, "A 1,5-V, 10-bit, 14,3-MS/s CMOS Pipelined Analog-to-Digital Converter" IEEE JSSC, vol.34, no.5, pp. 599-606, May 1999.
3. L.Singer, S. Ho, M. Timko, and D. Kelly, "A 12b 65Msample/s CMOS ADC with 82dB SFDR at 120MHz" ISSCC Dig. Tech. Papers, pp. 38-39, Feb. 2000.
4. B.M. Min, P.Kim, D. Boisvert, A. Aude "A 69mW 10b 80MS/s Pipelined CMOS ADC" ISSCC Dig. Tech. Papers, pp. 324-325, Feb. 2003
5. S.M. Yoo, J.B. Park, H.S. Yand, H.H.Bae, K.H. Moon, H.J. Park, S.H. Lee, J.H. Kim "A 10b 150MS/s 123mW 0.18μm CMOS Pipelined ADC" ISSCC Dig. Tech. Papers, pp. 326-327, Feb. 2003
6. K. Bult, G. J. G. M. Geelen "A fast-settling CMOS op amp for SC circuits with 90-dB DC gain" Solid-State Circuits, IEEE Journal of, Volume: 25 Issue: 6, pp. 1379-1384, Dec. 1990