A 3-V 340-mW 14-b 75-Msample/s CMOS ADC with 85-dB SFDR at Nyquist input

IEEE Journal of Solid-State Circuits

Volumn 36, Issue 12, 2001, Pages 1931-1936

  Yang, Wenhua ^a,b   Kelly, Dan ^a,b   Mehr, Iuri ^a,b   Sayuk, Mark T ^a,b   Singer, Larry ^a,b  

^a IEEE   (United States)

^b ANALOG DEVICES INC   (United States)

Author keywords

Analog digital conversion; CMOS analog integrated circuits; Data conversion; Pipeline; Sample and hold circuits

Indexed keywords

ANALOG TO DIGITAL CONVERTER; DIFFERENTIAL NONLINEARITY; INTEGRAL NONLINEARITY; NYQUIST FREQUENCY; SAMPLE-AND-HOLD CIRCUITS; SPURIOUS FREE DYNAMIC RANGE; SWITCHED CAPACITOR; TRACK-AND-HOLD AMPLIFIER;

AMPLIFIERS (ELECTRONIC); CAPACITORS; CMOS INTEGRATED CIRCUITS; ELECTRIC POWER SUPPLIES TO APPARATUS; FREQUENCIES; INTEGRATED CIRCUIT MANUFACTURE; SIGNAL TO NOISE RATIO; SWITCHING NETWORKS;

ANALOG TO DIGITAL CONVERSION;

EID: 0035693618     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.972143     Document Type: Article

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3. A 3-V 340-mW 14-b 75-MSPS CMOS ADC with 85-dB SFDR at Nyquist
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