Analog-to-digital converter survey and analysis

IEEE Journal on Selected Areas in Communications

Volumn 17, Issue 4, 1999, Pages 539-550

  Walden, Robert H ^a,b  

^a Hughes Aircraft Co   (United States)

^b NEW YORK UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPARATOR CIRCUITS; COMPUTER SOFTWARE; DIGITAL RADIO; SIGNAL PROCESSING; SIGNAL TO NOISE RATIO; SPURIOUS SIGNAL NOISE;

APERTURE JITTER; COMPARATOR AMBIGUITY; INPUT REFERRED NOISE; SPURIOUS FREE DYNAMIC RANGE;

ANALOG TO DIGITAL CONVERSION;

EID: 0032632072     PISSN: 07338716     EISSN: None     Source Type: Journal    
DOI: 10.1109/49.761034     Document Type: Article

References (34)

1. J. Mitola, "The software radio architecture," IEEE Commun. Mag., vol. 33, pp. 26-38, May 1995.
2. J. A. Wepman, "Analog-to-digital converters and their applications in radio receivers," IEEE Commun. Mag., vol. 33, pp. 39-45, May 1995.
3. R. Baines, "The DSP bottleneck," IEEE Commun. Mag., vol. 33, pp. 46-54, May 1995.
4. R. H. Walden, "Analog-to-digital converter technology comparison," in IEEE GaAs IC Symp. Tech. Dig., Oct. 1994, pp. 217-219.
5. C. Baringer, J. F. Jensen, L. Burns, and R. H. Walden, "A 3-bit, 8 GSPS flash ADC," in Proc. Indium Phos. Rel. Mater. Conf., Apr. 1996, pp. 64-67.
6. A. V. Oppenheim and R. W. Schafer, Discrete-Time Signal Processing. Englewood Cliffs, NJ: Prentice-Hall, ch. 3, p. 114.
7. L. E. Larson, "High-speed analog-to-digital conversion with GaAs technology: Prospects, trends, and obstacles," presented at the 14th European Solid-State Circuits Conf., Manchester, England, Sept. 1988.
8. J. F. Jensen, private communication.
9. Y. Matsuoka and E. Sano, "High-speed AlGaAs/GaAs HBT's and their applications to 40-Gbit/s-class IC's," in IEEE GaAs IC Symp. Tech. Dig., Oct. 1994, vol 16, pp. 185-188.
10. T. Enoki, T. Kobayashi, and Y. Ishii, "Device technologies for InP-based HEMT's and their application to IC's," in IEEE GaAs IC Symp. Tech. Dig., Oct. 1994, vol. 16, pp. 337-340.
11. T InP/InGaAs double-heterojunction bipolar transistors with step-graded InGaAsP collectors," in IEEE GaAs IC Symp. Tech. Dig., Oct. 1994, vol. 16, pp. 345-348.
12. J. van Valberg and R. J. van de Plassche, "An 8-bit 650 MHz folding ADC," IEEE J. Solid-State Circuits, vol. 27, pp. 1662-1666, Dec. 1992.
13. K. Poulton, K. L. Knudsen, J. Corcoran, K.-C. Wang, R. B. Nubling, R. L. Pierson, M.-C. F. Chang, and P. M. Asbeck, "A 6-bit, 4 Gsa/s ADC fabricated in a GaAs HBT process," in GaAs IC Symp. Tech. Dig., Oct. 1994, vol. 16, pp. 240-243.
14. K. Nary, R. Nubling, S. Beccue, W. Colleran, J. Penney, and K. Wang, "An 8-bit, 2 gigasample per second analog to digital converter," in GaAs IC Symp. Tech. Dig., Oct. 1995, vol. 17, pp. 303-246.
15. K. Sone, N. Naotoshi, Y. Nishida, M. Ishida, Y. Sekine, and M. Yotsuyanagi, "A 10b 100 Ms/s pipelined subranging BiCMOS ADC," in IEEE ISSCC Dig. Tech. Papers, Feb. 1993, vol. 36, pp. 66-67.
16. W. T. Colleran, T. H. Phan, and A. A. Abidi, "A 10b 100 Ms/s pipelined A/D converter." in IEEE ISSCC Dig. Tech. Papers, Feb. 1993, vol. 36, pp. 68-69.
17. C. Schiller and P. Byrne, "A 4-GHz 8-b ADC system," IEEE J. Solid-State Circuits, vol. 26, pp. 1781-1789, Dec. 1991.
18. J. C. Candy and G. C. Temes, Eds., "Oversampling Delta-Sigma Data Converters. New York: IEEE Press, 1992 (see Introduction).
19. J. F. Jensen, G. Raghavan, A. E. Cosand, and R. H. Walden, "A 3.2 GHz 2nd order delta-sigma modulator implemented in InP HBT technology," IEEE J. Solid-State Circuits, vol. 30, pp. 1119-1127, Oct. 1995.
20. F. W. Singor and W. M. Snelgrove, "Switched capacitor bandpass delta-sigma A/D modulation at 10.7 MHz," IEEE J. Solid-State Circuits, vol. 30, pp. 184-192, Mar. 1995.
21. G. Raghavan, J. F. Jensen, R. H. Walden, and W. P. Posey, "A bandpass ΔΣ modulator with 92 dB SNR and center frequency continuously programmable from O to 70 MHz," in ISSCC Tech. Dig., Feb. 1997, vol. 40, pp. 214-215.
22. A. Jayaraman et al., "Bandpass delta-sigma modulator with 800 MHz center frequency," in IEEE GaAs IC Symp. Tech. Dig., Oct. 1997, vol. 19, pp. 95-98.
23. R. H. Walden, A. E. Schmitz, A. R. Kramer, L. E. Larson, and J. Pasiecznik, "A deep-submicrometer analog-to-digital converter using focused-ion-beam implants," IEEE J. Solid-State Circuits, vol. 25, pp. 562-571, Apr. 1990.
24. T. Ducourant, M. Binet, J.-C. Baelde, Ch. Rocher, and J.-M. Gibereau, "3 GHz 150 mW, 4-bit GaAs analog to digital converter," IEEE GaAs IC Symp. Tech. Dig., Oct. 1986, p. 209.
25. P. Vorenkamp and R. Roovers, "A 12b 50Msample/s cascaded folding and interpolating ADC," in IEEE ISSCC Dig. Tech. Papers, Feb. 1997, vol. 40. pp. 134-135.
26. S.-U. Kwak, B.-S. Song, and K. Bacrania, "A 15b 5M sample/s low-spurious CMOS ADC," in IEEE ISSCC Dig. Tech. Papers, Feb. 1997, vol. 40, pp. 146-147.
27. T. B. Cho and P. R. Gray, "A 10b, 20 Msample/s, 35 mW pipeline A/D converter," IEEE J. Solid-State Circuits, vol. 30, pp. 166-172, Mar. 1995.
28. K. Kusumoto, A. Matsuzawa, and K. Murata, "A 10-b, 20-MHz, 30 mW pipelined interpolating CMOS ADC," IEEE J. Solid-State Circuits, vol. 28, pp. 1200-1206, Dec. 1993.
29. Analog Devices, Inc., part number AD6640, 12-bit, 65 Msps ADC, 1997.
30. F. Chen and B. Leung, "A 0.25-mW low-pass passive sigma-delta modulator with built-in mixer for a 10-MHz IF input," IEEE J. Solid-State Circuits, vol. 32, pp. 774-782, June 1997.
31. E. van der Zwan, "A 2.3 mW CMOS SD modulator for audio applications," IEEE ISSCC Dig. Tech. Papers, Feb. 1997, vol. 40, pp. 220-221.
32. G. Yin and W. Sansen, "A high-frequency and high-resolution fourth-order SD A/D converter in BiCMOS technology," IEEE J. Solid-State Circuits, vol. 29, pp. 857-865, Aug. 1994.
33. S. Rabii and B. A. Wooley, "A 1.8 V digital-audio sigma-delta modulator in 0.8 mm CMOS," IEEE J. Solid-State Circuits, vol. 32, pp. 783-796. June 1997.
34. E. Stebbins and P. Bradley, "Hypres flash ADC program report," Hypres, Inc., 1993.