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Volumn 50, Issue 4-5, 2006, Pages 411-418

Emerging nanoscale silicon devices taking advantage of nanostructure physics

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; MOSFET DEVICES; NANOSTRUCTURED MATERIALS; QUANTUM ELECTRONICS; SEMICONDUCTOR DEVICE MANUFACTURE;

EID: 33748519851     PISSN: 00188646     EISSN: 00188646     Source Type: Journal    
DOI: 10.1147/rd.504.0411     Document Type: Article
Times cited : (23)

References (30)
  • 1
    • 33748545042 scopus 로고    scopus 로고
    • International Technology Roadmap for Semiconductors (ITRS); see
    • International Technology Roadmap for Semiconductors (ITRS); see http:// public.itrs.net/.
  • 2
    • 0027878002 scopus 로고
    • "Sub-50 nm Gate Length n-MOSFETs with 10 nm Phosphorus Source and Drain Junctions"
    • M. Ono, M. Saito, T. Yoshitomi, C. Fiegna, T. Ohguro, and H. Iwai, "Sub-50 nm Gate Length n-MOSFETs with 10 nm Phosphorus Source and Drain Junctions," IEDM Tech. Digest, pp. 119-122 (1993).
    • (1993) IEDM Tech. Digest , pp. 119-122
    • Ono, M.1    Saito, M.2    Yoshitomi, T.3    Fiegna, C.4    Ohguro, T.5    Iwai, H.6
  • 8
    • 0034246556 scopus 로고    scopus 로고
    • "Experimental Evidence for Quantum Mechanical Narrow Channel Effect in Ultra-Narrow MOSFETs"
    • H. Majima, H. Ishikuro, and T. Hiramoto, "Experimental Evidence for Quantum Mechanical Narrow Channel Effect in Ultra-Narrow MOSFETs," IEEE Electron Device Lett. 21, No. 8, 396-398 (2000).
    • (2000) IEEE Electron Device Lett. , vol.21 , Issue.8 , pp. 396-398
    • Majima, H.1    Ishikuro, H.2    Hiramoto, T.3
  • 9
    • 0035718380 scopus 로고    scopus 로고
    • "Impact of Quantum Mechanical Effects on Design of Nano-Scale Narrow Channel n-and p-Type MOSFETs"
    • H. Majima, Y. Saito, and T. Hiramoto, "Impact of Quantum Mechanical Effects on Design of Nano-Scale Narrow Channel n-and p-Type MOSFETs," IEDM Tech. Digest, pp. 733-736 (2001).
    • (2001) IEDM Tech. Digest , pp. 733-736
    • Majima, H.1    Saito, Y.2    Hiramoto, T.3
  • 10
    • 33745173823 scopus 로고    scopus 로고
    • "Superior Mobility Characteristics in (110)-Oriented Ultra Thin Body pMOSFETs with SOI Thickness Less Than 6 nm"
    • G. Tsutsui, M. Saitoh, and T. Hiramoto, "Superior Mobility Characteristics in (110)-Oriented Ultra Thin Body pMOSFETs with SOI Thickness Less Than 6 nm," Symp. VLSI Technol., pp. 76-77 (2005).
    • (2005) Symp. VLSI Technol. , pp. 76-77
    • Tsutsui, G.1    Saitoh, M.2    Hiramoto, T.3
  • 11
    • 27744592434 scopus 로고    scopus 로고
    • "Experimental Study on Superior Mobility in (110)-Oriented UTB SOI pMOSFETs"
    • G. Tsutsui, M. Saitoh, and T. Hiramoto, "Experimental Study on Superior Mobility in (110)-Oriented UTB SOI pMOSFETs," IEEE Electron Device Lett. 26, No. 11, 836-838 (2005).
    • (2005) IEEE Electron Device Lett. , vol.26 , Issue.11 , pp. 836-838
    • Tsutsui, G.1    Saitoh, M.2    Hiramoto, T.3
  • 12
    • 24244452766 scopus 로고
    • "Electronics Transport Properties of a Two-Dimensional Electron Gas in a Silicon Quantum-Well Structure at Low Temperature"
    • A. Gold, "Electronics Transport Properties of a Two-Dimensional Electron Gas in a Silicon Quantum-Well Structure at Low Temperature," Phys. Rev. B 35, No 2, 723-733 (1987).
    • (1987) Phys. Rev. B , vol.35 , Issue.2 , pp. 723-733
    • Gold, A.1
  • 13
    • 51149213981 scopus 로고
    • "Interface Roughness Scattering in GaAs/AIAs Quantum Wells"
    • H. Sakaki, T. Noda, K. Hirakawa, M. Tanaka, and T. Matsusue, "Interface Roughness Scattering in GaAs/AIAs Quantum Wells," Appl. Phys. Lett. 51, No. 23, 1934-1936 (1987).
    • (1987) Appl. Phys. Lett. , vol.51 , Issue.23 , pp. 1934-1936
    • Sakaki, H.1    Noda, T.2    Hirakawa, K.3    Tanaka, M.4    Matsusue, T.5
  • 14
    • 21644454069 scopus 로고    scopus 로고
    • "In-Plane Mobility Anisotropy and Universality Under Uni-Axial Strains in n- and p-MOS Inversion Layers on (100), (110), and (111) Si"
    • H. Irie, K. Kita, K. Kyuno, and A. Toriumi, "In-Plane Mobility Anisotropy and Universality Under Uni-Axial Strains in n- and p-MOS Inversion Layers on (100), (110), and (111) Si," IEDM Tech. Digest, pp. 225-228 (2004).
    • (2004) IEDM Tech. Digest , pp. 225-228
    • Irie, H.1    Kita, K.2    Kyuno, K.3    Toriumi, A.4
  • 15
    • 0036927506 scopus 로고    scopus 로고
    • "Experimental Study on Carrier Transport Mechanism in Ultrathin-Body SOI n- and p-MOSFETs with SOI Thickness Less Than 5 nm"
    • K. Uchida, H. Watanabe, A. Kinoshita, J. Koga, T. Numata, and S. Takagi, "Experimental Study on Carrier Transport Mechanism in Ultrathin-Body SOI n- and p-MOSFETs with SOI Thickness Less Than 5 nm," IEDM Tech. Digest, pp. 47-50 (2002).
    • (2002) IEDM Tech. Digest , pp. 47-50
    • Uchida, K.1    Watanabe, H.2    Kinoshita, A.3    Koga, J.4    Numata, T.5    Takagi, S.6
  • 16
    • 4544369573 scopus 로고    scopus 로고
    • "Selectively-Formed High Mobility SiGe-on-Insulator pMOSFETs with Ge-Rich Strained Surface Channels Using Local Condensation Technique"
    • T. Tezuka, S. Nakaharai, Y. Moriyama, N. Sugiyama, and S. Takagi, "Selectively-Formed High Mobility SiGe-on-Insulator pMOSFETs with Ge-Rich Strained Surface Channels Using Local Condensation Technique," Symp. VLSI Technol., pp. 198-199 (2004).
    • (2004) Symp. VLSI Technol. , pp. 198-199
    • Tezuka, T.1    Nakaharai, S.2    Moriyama, Y.3    Sugiyama, N.4    Takagi, S.5
  • 17
    • 21644458299 scopus 로고    scopus 로고
    • "High Electron and Hole Mobility Enhancements in Thin-Body Strained Si/Strained SiGe/Strained Si Heterostructures on Insulator"
    • I. Åberg, C. Ní Chléirigh; O. O. Olubuyide, X. Duan, and J. L. Hoyt, "High Electron and Hole Mobility Enhancements in Thin-Body Strained Si/Strained SiGe/Strained Si Heterostructures on Insulator," IEDM Tech. Digest, pp. 173-176 (2004).
    • (2004) IEDM Tech. Digest , pp. 173-176
    • Åberg, I.1    Ní Chléirigh, C.2    Olubuyide, O.O.3    Duan, X.4    Hoyt, J.L.5
  • 18
    • 0043269756 scopus 로고    scopus 로고
    • "Six-Band k · p Calculation of the Hole Mobility in Silicon Inversion Layers: Dependence on Surface Orientation, Strain, and Silicon Thickness"
    • M. V. Fischetti, Z. Ren, P. M. Solomon, M. Yang, and K. Rim, "Six-Band k · p Calculation of the Hole Mobility in Silicon Inversion Layers: Dependence on Surface Orientation, Strain, and Silicon Thickness," J. Appl. Phys. 94, No. 12, 1079-1095 (2003).
    • (2003) J. Appl. Phys. , vol.94 , Issue.12 , pp. 1079-1095
    • Fischetti, M.V.1    Ren, Z.2    Solomon, P.M.3    Yang, M.4    Rim, K.5
  • 20
    • 0001182140 scopus 로고    scopus 로고
    • "Effects of Traps on Charge Storage Characteristics in Metal-Oxide-Semiconductor Memory Structures Based on Silicon Nanocrystals"
    • Y. Shi, K. Saito, H. Ishikuro, and T. Hiramoto, "Effects of Traps on Charge Storage Characteristics in Metal-Oxide-Semiconductor Memory Structures Based on Silicon Nanocrystals," J. Appl. Phys. 84, 2358-2360 (1998).
    • (1998) J. Appl. Phys. , vol.84 , pp. 2358-2360
    • Shi, Y.1    Saito, K.2    Ishikuro, H.3    Hiramoto, T.4
  • 21
    • 2442521364 scopus 로고    scopus 로고
    • "Scaling of Nano-Crystal Memory Cell by Direct Tungsten Bitline on Self-Aligned Landing Plug Polysilicon Contact"
    • I. Kim, K. Yanagidaira, and T. Hiramoto, "Scaling of Nano-Crystal Memory Cell by Direct Tungsten Bitline on Self-Aligned Landing Plug Polysilicon Contact," IEEE Electron Device Lett. 25, No. 5, 265-267 (2004).
    • (2004) IEEE Electron Device Lett. , vol.25 , Issue.5 , pp. 265-267
    • Kim, I.1    Yanagidaira, K.2    Hiramoto, T.3
  • 23
    • 0001185858 scopus 로고    scopus 로고
    • "Quantum Mechanical Effects in the Silicon Quantum Dot in a Single-Electron Transistor"
    • H. Ishikuro and T. Hiramoto, "Quantum Mechanical Effects in the Silicon Quantum Dot in a Single-Electron Transistor," Appl. Phys. Lett. 71, No. 25, 3691-3693 (1997).
    • (1997) Appl. Phys. Lett. , vol.71 , Issue.25 , pp. 3691-3693
    • Ishikuro, H.1    Hiramoto, T.2
  • 24
    • 0035943829 scopus 로고    scopus 로고
    • "Transport Spectroscopy of the Ultrasmall Silicon Quantum Dot in a Single-Electron Transistor"
    • M. Saitoh, T. Saito, T. Inukai, and T. Hiramoto, "Transport Spectroscopy of the Ultrasmall Silicon Quantum Dot in a Single-Electron Transistor,". Appl. Phys. Lett. 79, No. 13, 2025-2027 (2001).
    • (2001) Appl. Phys. Lett. , vol.79 , Issue.13 , pp. 2025-2027
    • Saitoh, M.1    Saito, T.2    Inukai, T.3    Hiramoto, T.4
  • 25
    • 33645664768 scopus 로고    scopus 로고
    • "Very Sharp Room-Temperature Negative Differential Conductance in Silicon Single-Hole Transistor with High Voltage Gain"
    • K. Miyaji, M. Saitoh, and T. Hiramoto, "Very Sharp Room-Temperature Negative Differential Conductance in Silicon Single-Hole Transistor with High Voltage Gain," Appl. Phys. Lett. 88, No. 14, 143505 (2006).
    • (2006) Appl. Phys. Lett. , vol.88 , Issue.14 , pp. 143505
    • Miyaji, K.1    Saitoh, M.2    Hiramoto, T.3
  • 26
    • 2442473699 scopus 로고    scopus 로고
    • "Extension of Coulomb Blockade Region by Quantum Confinement in the Ultrasmall Silicon Dot in a Single-Hole Transistor at Room Temperature"
    • M. Saitoh and T. Hiramoto, "Extension of Coulomb Blockade Region by Quantum Confinement in the Ultrasmall Silicon Dot in a Single-Hole Transistor at Room Temperature," Appl. Phys. Lett. 84, No. 16, 3172-3174 (2004).
    • (2004) Appl. Phys. Lett. , vol.84 , Issue.16 , pp. 3172-3174
    • Saitoh, M.1    Hiramoto, T.2
  • 27
    • 19944406505 scopus 로고    scopus 로고
    • "Room-Temperature Operation of Current Switching Circuit Using Integrated Silicon Single-Hole Transistors"
    • M. Saitoh, H. Harata, and T. Hiramoto, "Room-Temperature Operation of Current Switching Circuit Using Integrated Silicon Single-Hole Transistors," Jpn. J. Appl. Phys. 44, No. 11, L338-L341 (2005).
    • (2005) Jpn. J. Appl. Phys. , vol.44 , Issue.11
    • Saitoh, M.1    Harata, H.2    Hiramoto, T.3
  • 28
    • 21644485291 scopus 로고    scopus 로고
    • "Room Temperature Demonstration of Integrated Silicon Single-Electron Transistor Circuits for Current Switching and Analog Pattern Matching"
    • M. Saitoh, H. Harata, and T. Hiramoto, "Room Temperature Demonstration of Integrated Silicon Single-Electron Transistor Circuits for Current Switching and Analog Pattern Matching," IEDM Tech. Digest, pp. 187-190 (2004).
    • (2004) IEDM Tech. Digest , pp. 187-190
    • Saitoh, M.1    Harata, H.2    Hiramoto, T.3
  • 29
    • 3042774137 scopus 로고    scopus 로고
    • "Room-Temperature Demonstration of Highly-Functional Single-Hole Transistor Logic Based on Quantum Mechanical Effect"
    • M. Saitoh and T. Hiramoto, "Room-Temperature Demonstration of Highly-Functional Single-Hole Transistor Logic Based on Quantum Mechanical Effect," IEE Electron. Lett. 40, No. 13, 837-838 (2004).
    • (2004) IEE Electron. Lett. , vol.40 , Issue.13 , pp. 837-838
    • Saitoh, M.1    Hiramoto, T.2
  • 30
    • 0242526854 scopus 로고    scopus 로고
    • "Analog Soft-Pattern-Matching Classifier Using Floating-Gate MOS Technology"
    • T. Yamasaki and T. Shibata, "Analog Soft-Pattern-Matching Classifier Using Floating-Gate MOS Technology," IEEE Trans. Neural Networks 14, No. 5, 1257-1265 (2003).
    • (2003) IEEE Trans. Neural Networks , vol.14 , Issue.5 , pp. 1257-1265
    • Yamasaki, T.1    Shibata, T.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.