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Volumn 11, Issue 2, 2003, Pages 157-166

Driver modeling and alignment for worst-case delay noise

Author keywords

Cross coupled noise analysis; Delay computation; Delay noise; Signal integrity; Timing verification

Indexed keywords

ALGORITHMS; CAPACITANCE; COMPUTER SIMULATION; MICROPROCESSOR CHIPS; SIGNAL NOISE MEASUREMENT;

EID: 0041767397     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2002.808448     Document Type: Article
Times cited : (18)

References (32)
  • 1
    • 0003149666 scopus 로고    scopus 로고
    • Wire delay in the presence of crosstalk
    • G. Yee, R. Chandra, V. Ganesan, and C. Sechen, "Wire delay in the presence of crosstalk," in Proc. TAU, 1997, pp. 170-175.
    • (1997) Proc. TAU , pp. 170-175
    • Yee, G.1    Chandra, R.2    Ganesan, V.3    Sechen, C.4
  • 3
    • 0024933412 scopus 로고
    • Dynamic noise margins of MOS logic gates
    • J. M. Zurada, Y. S. Joo, and S. V. Bell, "Dynamic noise margins of MOS logic gates," Proc. IEEE ISCAS, pp. 1153-1156, 1989.
    • (1989) Proc. IEEE ISCAS , pp. 1153-1156
    • Zurada, J.M.1    Joo, Y.S.2    Bell, S.V.3
  • 5
    • 0031619509 scopus 로고    scopus 로고
    • Design methodologies for noise in digital integrated circuits
    • K. L. Shepard, "Design methodologies for noise in digital integrated circuits," Proc. ACM/IEEE Design Automation Conf., pp. 94-99, 1998.
    • (1998) Proc. ACM/IEEE Design Automation Conf. , pp. 94-99
    • Shepard, K.L.1
  • 7
    • 0012837457 scopus 로고    scopus 로고
    • An analytical model for delay and crosstalk estimation with application to decoupling
    • M. Becer and I. J. Hajj, "An analytical model for delay and crosstalk estimation with application to decoupling," Proc. IEEE Int. Symp. Quality Electron. Design, pp. 51-57, 2000.
    • (2000) Proc. IEEE Int. Symp. Quality Electron. Design , pp. 51-57
    • Becer, M.1    Hajj, I.J.2
  • 8
    • 85030259511 scopus 로고    scopus 로고
    • Noise and delay uncertainty studies for coupled RC interconnects
    • A. B. Kahng, S. Muddu, and D. Vidhani, "Noise and delay uncertainty studies for coupled RC interconnects," in Proc. ASIC/SOC Conf., 1999, pp. 3-8.
    • (1999) Proc. ASIC/SOC Conf. , pp. 3-8
    • Kahng, A.B.1    Muddu, S.2    Vidhani, D.3
  • 10
    • 0027222295 scopus 로고
    • Closed-form expressions for interconnection delay, coupling, and crosstalk in VLSI's
    • Jan.
    • T. Sakurai, "Closed-form expressions for interconnection delay, coupling, and crosstalk in VLSI's," IEEE Trans. Electron Devices, vol. 40, pp. 118-124, Jan. 1993.
    • (1993) IEEE Trans. Electron Devices , vol.40 , pp. 118-124
    • Sakurai, T.1
  • 12
    • 0031336414 scopus 로고    scopus 로고
    • Efficient coupled noise estimation for on-chip interconnects
    • A. Devgan, "Efficient coupled noise estimation for on-chip interconnects," Proc. IEEE/ACM Int. Conf. Comput.-Aided Design, pp. 147-153, 1997.
    • (1997) Proc. IEEE/ACM Int. Conf. Comput.-Aided Design , pp. 147-153
    • Devgan, A.1
  • 24
    • 0028756124 scopus 로고
    • Modeling the effective capacitance for the RC interconnect of CMOS gates
    • Dec.
    • J. Qian, S. Pullela, and L. T. Pillage, "Modeling the effective capacitance for the RC interconnect of CMOS gates," IEEE Trans. Comput.-Aided Design, pp. 1526-1555, Dec. 1994.
    • (1994) IEEE Trans. Comput.-Aided Design , pp. 1526-1555
    • Qian, J.1    Pullela, S.2    Pillage, L.T.3
  • 25
    • 0030686019 scopus 로고    scopus 로고
    • Calculating worst-case gate delays due to dominant capacitance coupling
    • June
    • F. Dartu and L. T. Pileggi, "Calculating worst-case gate delays due to dominant capacitance coupling," in Proc. DAC, June 1997, pp. 46-51.
    • (1997) Proc. DAC , pp. 46-51
    • Dartu, F.1    Pileggi, L.T.2
  • 27
    • 0033885244 scopus 로고    scopus 로고
    • Capturing the effect of crosstalk on delay
    • Jan.
    • S. Sapatnekar, "Capturing the effect of crosstalk on delay," in Proc. VLSI Design 2000, Jan. 2000, pp. 364-369.
    • (2000) Proc. VLSI Design 2000 , pp. 364-369
    • Sapatnekar, S.1
  • 29
    • 84949777577 scopus 로고    scopus 로고
    • Switching window computation for static timing analysis in the presence of crosstalk noise
    • P. Chen, D. A. Kirkpatrick, and K. Keutzer, "Switching window computation for static timing analysis in the presence of crosstalk noise," Proc. IEEE/ACM Int. Conf. Comput.-Aided Design, pp. 331-337, 2000.
    • (2000) Proc. IEEE/ACM Int. Conf. Comput.-Aided Design , pp. 331-337
    • Chen, P.1    Kirkpatrick, D.A.2    Keutzer, K.3
  • 30
    • 85013972107 scopus 로고    scopus 로고
    • Crosstalk delay analysis using relative window method
    • Y. Sasaki and G. De Micheli, "Crosstalk delay analysis using relative window method," in IEEE Int. ASIC/SOC Conf., 1999, pp. 9-13.
    • (1999) IEEE Int. ASIC/SOC Conf. , pp. 9-13
    • Sasaki, Y.1    De Micheli, G.2
  • 32
    • 0035333780 scopus 로고    scopus 로고
    • Aggressor alignment for worst-case crosstalk noise
    • May
    • L. H. Chen and M. Marek-Sadowska, "Aggressor alignment for worst-case crosstalk noise," IEEE Trans. Comput.-Aided Design, vol. 20, pp. 612-621, May 2001.
    • (2001) IEEE Trans. Comput.-Aided Design , vol.20 , pp. 612-621
    • Chen, L.H.1    Marek-Sadowska, M.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.