Crosstalk in VLSI interconnections

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 18, Issue 12, 1999, Pages 1817-1824

  Vittal, Ashok ^a   Chen, Lauren Hui ^a   Marek Sadowska, Malgorzata ^a   Wang, Kai Ping ^a   Yang, Sherry ^a  

^a SYNOPSYS INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; COMPUTATIONAL METHODS; CROSSTALK; ELECTRIC NETWORK TOPOLOGY; ELECTRIC RESISTANCE; ERROR ANALYSIS; INTEGRATED CIRCUIT LAYOUT; OPTIMIZATION; SPURIOUS SIGNAL NOISE; TRANSISTORS;

COUPLED NOISE; SIGNAL INTEGRITY; TRANSISTOR SIZING; WIRE WIDTH OPTIMIZATION;

VLSI CIRCUITS;

EID: 0033320052     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.811330     Document Type: Article

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