메뉴 건너뛰기




Volumn , Issue , 2005, Pages 129-136

Latchup in merged triple well structure

Author keywords

CMOS; ESD; Latchup; Silicon Germanium (SiGe); Triple Well

Indexed keywords


EID: 28744452785     PISSN: 15417026     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (31)

References (59)
  • 1
    • 28744433148 scopus 로고
    • U.S. Patent 1,745,175 and O.Heil, British Patent 439,457
    • J.E. Lilienfeld, U.S. Patent 1,745,175 (1930) and O.Heil, British Patent 439,457.
    • (1930)
    • Lilienfeld, J.E.1
  • 2
    • 0038040245 scopus 로고
    • Radiation induced regeneration through the P-N junction isolation in monolithic iC's
    • October
    • K. Kinoshito, C.T. Kleiner, and E.D. Johnson, "Radiation Induced Regeneration Through the P-N Junction Isolation in Monolithic iC's," IEEE Transaction of Nuclear Science, NS-12, October 1965 pp.83-90.
    • (1965) IEEE Transaction of Nuclear Science , vol.NS-12 , pp. 83-90
    • Kinoshito, K.1    Kleiner, C.T.2    Johnson, E.D.3
  • 3
    • 28744449246 scopus 로고
    • Study of transient radiation induced latchup
    • (Contract N0014-66-C-0347) No. GA-7969, May
    • R. A. Poll, and J.F. Leavy, "Study of Transient Radiation Induced Latchup," General Atomic Division Final Report (Contract N0014-66-C-0347) No. GA-7969, May 1967.
    • (1967) General Atomic Division Final Report
    • Poll, R.A.1    Leavy, J.F.2
  • 4
    • 0014617202 scopus 로고
    • Radiation induced integrated circuit latchup
    • Dec.
    • J.F. Leavy, and R.A. Poll, "Radiation Induced Integrated Circuit Latchup," IEEE Trans. On Nuclear Science, NS-16, Dec. 1969, pp. 96-103.
    • (1969) IEEE Trans. on Nuclear Science , vol.NS-16 , pp. 96-103
    • Leavy, J.F.1    Poll, R.A.2
  • 5
    • 0014617233 scopus 로고
    • Transient radiation response of complementary symmetry MOS integrated circuits
    • December
    • W.J. Dennehy, A. G. Holmes-Seidle, and W.F. Leipold, "Transient Radiation Response of Complementary Symmetry MOS Integrated Circuits, "IEEE Trans. On Nuclear Science, NS-16, December 1969, pp. 114-119.
    • (1969) IEEE Trans. on Nuclear Science , vol.NS-16 , pp. 114-119
    • Dennehy, W.J.1    Holmes-Seidle, A.G.2    Leipold, W.F.3
  • 7
    • 84885663789 scopus 로고
    • Latchup studies in bulk silicon CMOS integrated circuits
    • Albuquerque, NM, January 30
    • B.L. Gregory, "Latchup Studies in Bulk Silicon CMOS Integrated Circuits," Sandia Laboratories Report No.73-3003, Albuquerque, NM, January 30, 1973.
    • (1973) Sandia Laboratories Report No.73-3003 , vol.73 , Issue.3003
    • Gregory, B.L.1
  • 8
    • 3042650325 scopus 로고
    • CMOS latchup and prevention
    • Alburquerque, NM, June
    • B.L. Gregory, "CMOS Latchup and Prevention," Sandia Laboratories Report SAND75-0371, Alburquerque, NM, June 1975.
    • (1975) Sandia Laboratories Report , vol.SAND75-0371
    • Gregory, B.L.1
  • 9
    • 0037568803 scopus 로고
    • Reliability considerations for COS/MOS devices
    • RCA Corporation, Somerville, NJ, July
    • L.J. Gallace, and H.L. Pujol, "Reliability Considerations for COS/MOS Devices, RCA Technical Notes ST-6418, RCA Corporation, Somerville, NJ, July 1975.
    • (1975) RCA Technical Notes , vol.ST-6418
    • Gallace, L.J.1    Pujol, H.L.2
  • 10
    • 1242331678 scopus 로고
    • Latchup prevention in CMOS
    • Alburquerque, NM
    • C.E. Barnes, et al, "Latchup Prevention in CMOS," Sandia Laborator Report SAND76-0048, Alburquerque, NM, 1976.
    • (1976) Sandia Laborator Report , vol.SAND76-0048
    • Barnes, C.E.1
  • 11
    • 28744446101 scopus 로고
    • Transient surface damage and latchup in CMOS circuits
    • Research Triangle Park, North Carolina, June
    • M. Simons, "Transient Surface Damage and Latchup in CMOS Circuits," Research Triangle Institute Report RTI 43U-991, Research Triangle Park, North Carolina, June 1975.
    • (1975) Research Triangle Institute Report , vol.RTI 43U-991
    • Simons, M.1
  • 14
    • 0020909950 scopus 로고
    • Epitaxial layer enhancement of N-well guard rings for CMOS circuits
    • Dec.
    • R. Troutman, "Epitaxial Layer Enhancement of N-Well Guard Rings for CMOS Circuits," IEEE Trans. On Elec. Dev. Letters, Vol ED-4, Dec. 1983, pp.438-440.
    • (1983) IEEE Trans. on Elec. Dev. Letters , vol.ED-4 , pp. 438-440
    • Troutman, R.1
  • 15
    • 0020704130 scopus 로고
    • A transient analysis of latchup in bulk CMOS
    • Feb.
    • R. R. Troutman, and H.P. Zappe, "A Transient Analysis of Latchup in Bulk CMOS, IEEE Trans. Elec. Dev., ED-30, Feb. 1983, pp. 170-179.
    • (1983) IEEE Trans. Elec. Dev. , vol.ED-30 , pp. 170-179
    • Troutman, R.R.1    Zappe, H.P.2
  • 19
    • 0021201527 scopus 로고
    • Latchup model for parasitic path in bulk CMOS
    • Jan.
    • R. C. Fang and J. L. Moll, "Latchup Model for Parasitic Path in Bulk CMOS," IEEE Trans. Elec. Devices, ED-31, Jan. 1984, pp. 113-120.
    • (1984) IEEE Trans. Elec. Devices , vol.ED-31 , pp. 113-120
    • Fang, R.C.1    Moll, J.L.2
  • 20
    • 0021204461 scopus 로고
    • A better understanding of CMOS latchup
    • Jan.
    • G. Hu, "A Better Understanding of CMOS Latchup," IEEE Trans. Elec. Dev. ED-31, Jan. 1984, pp. 62-67.
    • (1984) IEEE Trans. Elec. Dev. , vol.ED-31 , pp. 62-67
    • Hu, G.1
  • 21
    • 0022757469 scopus 로고
    • Transmission line modeling of substrate resistance and CMOS latchup
    • July
    • R. R. Troutman and M.J. Hargrove, "Transmission Line Modeling of Substrate Resistance and CMOS Latchup," IEEE Trans. Elec. Dev., July 1986.
    • (1986) IEEE Trans. Elec. Dev.
    • Troutman, R.R.1    Hargrove, M.J.2
  • 24
    • 0029405952 scopus 로고
    • MeV implants boost device design
    • Nov.
    • S. Voldman, "MeV Implants Boost Device Design," IEEE Circuits and Devices, Vol. 11, No. 6, Nov. 1995, pp.8-16.
    • (1995) IEEE Circuits and Devices , vol.11 , Issue.6 , pp. 8-16
    • Voldman, S.1
  • 25
    • 0024607604 scopus 로고
    • Improvements of CMOS latchup using a high energy buried layer
    • March
    • H. Y. Lin, and C. H. Ting, "Improvements of CMOS latchup using a high energy buried layer," Nuclear Instrumentation Methods Phys. Review, Vol. B38/39, March 1989, pp. 960-964.
    • (1989) Nuclear Instrumentation Methods Phys. Review , vol.B38-39 , pp. 960-964
    • Lin, H.Y.1    Ting, C.H.2
  • 28
    • 0000618496 scopus 로고    scopus 로고
    • The effect of as-implanted damage on the microstructure of threading dislocations in MeV implanted silicon
    • August, August 1999
    • K. K. Bourdelle, D. J. Eaglesham, D. C. Jacobson, and J. Poate, "The effect of as-implanted damage on the microstructure of threading dislocations in MeV implanted silicon," Jour. of Applied Physics, Vol. 86, August 1999, August 1999, pp. 1221-1225.
    • (1999) Jour. of Applied Physics , vol.86 , pp. 1221-1225
    • Bourdelle, K.K.1    Eaglesham, D.J.2    Jacobson, D.C.3    Poate, J.4
  • 30
    • 84932120763 scopus 로고    scopus 로고
    • The influence of heavily doped buried layer implants 911 Electrostatic Discharge (ESD), latchup, and a silicon germanium heterojunction bipolar transistor in a BiCMOS SiGe technology
    • May
    • S. Voldman, L. Lanzerotti, W. Morris, and L. Rubin, "The Influence of Heavily Doped Buried Layer Implants 911 Electrostatic Discharge (ESD), Latchup, and a Silicon Germanium Heterojunction Bipolar Transistor in a BiCMOS SiGe Technology," in Proceedings of the International Reliability Physics Symposium (IRPS), May 2004 pp.143-151.
    • (2004) Proceedings of the International Reliability Physics Symposium (IRPS) , pp. 143-151
    • Voldman, S.1    Lanzerotti, L.2    Morris, W.3    Rubin, L.4
  • 34
    • 3042603747 scopus 로고    scopus 로고
    • Deep trench guard ring structures and evaluation of the probability of minority carrier escape for ESD and latchup in advanced BiCMOS SiGe technology
    • National Chiao-Tung University, Hsinchu City, Taiwan, November 12-13
    • A. Watson, S. Voldman, and T. Larsen, "Deep Trench Guard Ring Structures and Evaluation of the Probability of Minority Carrier Escape for ESD and Latchup in Advanced BiCMOS SiGe Technology," in Proceedings of the Taiwan Electrostatic Discharge Conference, National Chiao-Tung University, Hsinchu City, Taiwan, November 12-13, 2003, pp. 97-103.
    • (2003) Proceedings of the Taiwan Electrostatic Discharge Conference , pp. 97-103
    • Watson, A.1    Voldman, S.2    Larsen, T.3
  • 35
    • 84932172203 scopus 로고    scopus 로고
    • The influence of deep trench and substrate resistance on the latchup robustness in a BiCMOS silicon germanium technology
    • April 25-27
    • S. Voldman, and A. Watson, "The Influence of Deep Trench and Substrate Resistance on the Latchup Robustness in a BiCMOS Silicon Germanium Technology," in Proceedings of the International Reliability Physics Symposium (IRPS), April 25-27, 2004, pp.135-142.
    • (2004) Proceedings of the International Reliability Physics Symposium (IRPS) , pp. 135-142
    • Voldman, S.1    Watson, A.2
  • 36
    • 84945207434 scopus 로고    scopus 로고
    • The effect of deep trench isolation, trench isolation, and sub-collector on the Electrostatic Discharge (ESD) robustness of Radio Frequency (RF) ESD STI-bound P+/N-well diodes in a BiCMOS Silicon germanium technology
    • Sept.
    • th Electrical Overstress/Electrostatic Discharge (EOS/ESD) Symposium, Sept. 2003, pp. 214-223.
    • (2003) th Electrical Overstress/Electrostatic Discharge (EOS/ESD) Symposium , pp. 214-223
    • Voldman, S.1
  • 37
    • 17044389062 scopus 로고    scopus 로고
    • The effect of deep trench and sub-collector on the latchup robustness in BiCMOS silicon germanium technology
    • September 12-14, Montreal, Canada
    • A. Watson and S. Voldman, "The Effect of Deep Trench and Sub-collector on the Latchup Robustness in BiCMOS Silicon Germanium Technology," in the Proceedings of the Bipolar Circuit Technology Meeting (BCTM), September 12-14, Montreal, Canada, 2004, pp.172-175.
    • (2004) The Proceedings of the Bipolar Circuit Technology Meeting (BCTM) , pp. 172-175
    • Watson, A.1    Voldman, S.2
  • 38
    • 11344260412 scopus 로고    scopus 로고
    • The influence of polysilicon-filled deep trench and sub-collector implants on latchup robustness in RF CMOS and BiCMOS SiGe technology
    • October 18-20
    • S. Voldman, and A. Watson, "The Influence of Polysilicon-Filled Deep Trench and Sub-collector Implants on Latchup Robustness in RF CMOS and BiCMOS SiGe Technology," Proceedings of the Taiwan Electrostatic Discharge Conference (T-ESDC), October 18-20, 2004, pp. 15-19.
    • (2004) Proceedings of the Taiwan Electrostatic Discharge Conference (T-ESDC) , pp. 15-19
    • Voldman, S.1    Watson, A.2
  • 43
    • 15744385079 scopus 로고    scopus 로고
    • A review of CMOS latchup and Electrostatic Discharge (ESD) in bipolar complimentary MOSFET (BiCMOS) silicon germanium technologies: Part II-latchup
    • Invited Paper, to be published
    • S. Voldman, "A Review of CMOS Latchup and Electrostatic Discharge (ESD) in Bipolar Complimentary MOSFET (BiCMOS) Silicon Germanium Technologies: Part II-Latchup," Invited Paper, Journal of Microelectronics and Reliability, to be published 2005.
    • (2005) Journal of Microelectronics and Reliability
    • Voldman, S.1
  • 44
    • 11344291343 scopus 로고    scopus 로고
    • A review of CMOS latchup and Electrostatic Discharge (ESD) in bipolar complimentary MOSFET (BiCMOS) silicon germanium technologies: Part I-ESD
    • Introductory Invited Paper
    • S. Voldman, "A Review of CMOS Latchup and Electrostatic Discharge (ESD) in Bipolar Complimentary MOSFET (BiCMOS) Silicon Germanium Technologies: Part I-ESD," Introductory Invited Paper, Journal of Microelectronics and Reliability, 45, 2005, pp.323-340.
    • (2005) Journal of Microelectronics and Reliability , vol.45 , pp. 323-340
    • Voldman, S.1
  • 46
    • 0030127490 scopus 로고    scopus 로고
    • The influence of VLSI technology evolution on radiation-induced latchup in space systems
    • A. H. Johnston, "The Influence of VLSI Technology Evolution on Radiation-Induced Latchup in Space Systems," IEEE Transactions on Nuclear Science, Vol. 43, 1996, pp. 505-521.
    • (1996) IEEE Transactions on Nuclear Science , vol.43 , pp. 505-521
    • Johnston, A.H.1
  • 52
    • 0032095440 scopus 로고    scopus 로고
    • Microbeam mapping of single event latchups and single event upset in CMOS SRAMs
    • June
    • J. Barak, E. Adler, B. E. Fischer, M. Schlogl, and S. Metzger, "Microbeam Mapping of Single Event Latchups and Single Event Upset in CMOS SRAMs," IEEE Transactions on Nuclear Science, Vol. 45, No. 3, June 1998, pp. 1595-1602.
    • (1998) IEEE Transactions on Nuclear Science , vol.45 , Issue.3 , pp. 1595-1602
    • Barak, J.1    Adler, E.2    Fischer, B.E.3    Schlogl, M.4    Metzger, S.5
  • 53
    • 28744441554 scopus 로고    scopus 로고
    • Cable discharge event in local area network environment
    • Order No: 249812-001, July
    • Intel Corporation, "Cable Discharge Event in Local Area Network Environment," White Paper, Order No: 249812-001, July 2001.
    • (2001) White Paper
  • 56
    • 28744435502 scopus 로고    scopus 로고
    • Multiple factors trigger discharge events in Ethernet LANs
    • December 4
    • J. Deatherage, D. Jones, "Multiple factors trigger discharge events in Ethernet LANs" Electronic Design, Vol. 48, No. 25, December 4, 2000, pp.111-116.
    • (2000) Electronic Design , vol.48 , Issue.25 , pp. 111-116
    • Deatherage, J.1    Jones, D.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.