The effect of deep trench and sub-collector on the latchup robustness in BiCMOS silicon germanium technology

Proceedings of the IEEE Bipolar/BiCMOS Circuits and Technology Meeting

Volumn , Issue , 2004, Pages 172-175

  Watson, Anne ^a,b   Voldman, Steven H ^c  

^a PENNSYLVANIA STATE UNIVERSITY   (United States)

^b UNIVERSITY OF VERMONT   (United States)

^c IBM MICROELECTRONICS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DEEP TRENCH (DT) ISOLATION; HEAVILY DOPED BURIED LAYERS (HDBL); MIXED SIGNALS (MS); RESISTANCE SPACE; SUB-COLLECTOR STRUCTURES; SYSTEM-ON-CHIP (SOC);

BIPOLAR TRANSISTORS; COSTS; DENSITY (SPECIFIC GRAVITY); DOPING (ADDITIVES); ELECTRIC RESISTANCE; FUNCTIONS; GAIN CONTROL; SIGNAL PROCESSING; SILICON COMPOUNDS; TETRODES;

CMOS INTEGRATED CIRCUITS;

EID: 17044389062     PISSN: 10889299     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

1. D. B. Estreich, A. Ochoa, and R.W. Dutton, "Analysis of Latchup Prevention in CMOS IC's Using Epitaxial Buried Layer Process," IEDM Technical Digest, 1978.
2. D. B. Estreich, "The Physics and Modelling of Latchup and CMOS Integrated Circuits," Integrated Circuits Laboratory, Nov. 1980.
3. R. Troutman, "Latchup in CMOS Technology: The Problem and the Cure," Kluwer Publications, 1986.
4. S. Voldman, "MeV Implants Boost Device Design," IEEE Circuits and Devices, Vol. 11, No. 6, pp.8-16, Nov. 1995.
5. M. Hargrove, S. Voldman, J. Brown, K. Duncan, and W. Craig, "Latchup in CMOS," International Reliability Physics Symposium, pp.269-278, April 1998.
6. W. Morris, "CMOS Latchup," International Reliability Physics Symposium, May 2003.
7. A. Watson, S. Voldman and T. Larsen, "Deep Trench Guard ring structures and evaluation of the probability of escape for ESD and Latchup in Advanced BiCMOS SiGe Technology," Taiwan ESD Symposium, November, 2003.
8. S. Voldman and A. Watson, "The influence of deep trench and substrate resistance on latchup robustness of a BiCMOS Silicon Germanium Technology," International Reliability Physics Symposium, April, 2004.