Epi-replacement in CMOS technology by high dose, high energy boron implantation into Cz substrates

Proceedings of the International Conference on Ion Implantation Technology

Volumn , Issue , 2000, Pages 312-315

  Bourdelle, K K ^a   Chen, Y ^a   Ashton, R A ^a   Rubin, L M ^b   Agarwal, A ^b   Morris, W ^c  

^a NOKIA RESEARCH CENTER   (United States)

^b AXCELIS TECHNOLOGIES   (United States)

^c Silicon Engineering   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BORON IMPLANTATION; BURIED LAYER; CIRCUIT PARAMETER; CMOS TECHNOLOGY; CMOS TRANSISTORS; CZ SUBSTRATES; DIODE LEAKAGE; GATE OXIDE INTEGRITY; GROUND PLANES; HEAVILY DOPED; HIGH DOSE; HIGH DOSE BURIED LAYERS; HIGH ENERGY; LATCH-UPS;

BORON; CMOS INTEGRATED CIRCUITS; HIGH ENERGY PHYSICS; ION IMPLANTATION; SILICON WAFERS; TECHNOLOGY;

SUBSTRATES;

EID: 78649876234     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/.2000.924151     Document Type: Conference Paper

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