An adaptive pulse-triggered flip-flop for a high-speed and voltage-scalable standard cell library

IEEE Transactions on Circuits and Systems II: Express Briefs

Volumn 60, Issue 10, 2013, Pages 677-681

  Luo, Shien Chun ^a   Huang, Ching Ji ^a   Chu, Yuan Hua ^a  

^a INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE   (Taiwan)

Author keywords

Dynamic voltage scaling (DVS); flip flop; process variation; standard cell; subthreshold circuit

Indexed keywords

THRESHOLD VOLTAGE; VOLTAGE SCALING;

DYNAMIC VOLTAGE SCALING (DVS); GENERATING METHODS; INTRINSIC TRANSISTOR; PROCESS VARIATION; STANDARD CELL; SUB-THRESHOLD CIRCUITS; SUPPLY-VOLTAGE SCALING; TIMING CHARACTERISTICS;

FLIP FLOP CIRCUITS;

EID: 84886725328     PISSN: 15497747     EISSN: 15583791     Source Type: Journal    
DOI: 10.1109/TCSII.2013.2273844     Document Type: Article

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