Sensitivity-guided metaheuristics for accurate discrete gate sizing

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Volumn , Issue , 2012, Pages 233-239

  Hu, Jin ^a   Kahng, Andrew B ^b   Kang, Seokhyeong ^b   Kim, Myung Chul ^a   Markov, Igor L ^a  

^a UNIVERSITY OF MICHIGAN   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; DELAY CIRCUITS; GATES (TRANSISTOR);

CIRCUIT DELAYS; CIRCUIT TIMING; GATE CONFIGURATION; LARGE CIRCUITS; META HEURISTICS; META-HEURISTIC APPROACH; POWER OPTIMIZATION; POWER PERFORMANCE;

OPTIMIZATION;

EID: 84872316960     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2429384.2429428     Document Type: Conference Paper

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