Gate sizing by Lagrangian relaxation revisited

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 28, Issue 7, 2009, Pages 1071-1084

  Wang, Jia ^a   Das, Debasish ^b   Zhou, Hai ^c  

^a ILLINOIS INSTITUTE OF TECHNOLOGY   (United States)

^b Northwestern University   (United States)

^c NORTHWESTERN UNIVERSITY   (United States)

Author keywords

Convex programming; Gate sizing; Lagrangian relaxation; Method of feasible directions; Network flow

Indexed keywords

CONVEX PROGRAMMING; GATE SIZING; LAGRANGIAN RELAXATION; METHOD OF FEASIBLE DIRECTIONS; NETWORK FLOW;

GATES (TRANSISTOR);

LAGRANGE MULTIPLIERS;

EID: 67650917100     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2009.2018872     Document Type: Article

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